Sanyo Electric Co., Ltd.

Nobuo Itoh

Akiomi Kunisa

Seiichiro Takahashi

Yoshihiro Hori

Toshiaki Hioki

Satoshi Sumi

Kenji Nakao

Noboru Mamiya

Kenji Torazawa

Kenji Asano

Hisashi Matsuyama

Yoshiharu Uchihara

Nobuyuki Sekikawa

Kazuo Takeda

Tetsuya Kubota

Katsuhiro Hayasaka

Chikao Fujunuma

A digital modulation method in which at a head of an input block (pre-translation), each of a plurality of different types of initial data of t bits is multiplexed to generate a plurality of different types of multiplexed blocks, t bits at the head and immediately following t bits of each of the multiplexed blocks are subjected to exclusive OR operation, the immediately following t bits are replaced by the result of operation, the replaced t bits and the immediately following t bits are subjected to an exclusive OR operation, and the immediately following t bits are replaced by the result of operation, and thereafter in the similar manner, a convolution operation is executed. A plurality of different types of translated blocks are produced by the convolution operation, and DC components of thus provided translated blocks are calculated, respectively, absolute values of the respective DC components are compared with each other, and a translated block having the minimum value is selected and output externally.

Method and circuit for digital modulation and method and circuit for digital demodulation

A meandering groove is formed in a digital disk (,) with a wobble signal that is wobbled to reproduce a clock signal. The wobble signal is read out by an optical head (,). An address detection circuit (,) detects an address signal that is multiplexed with the wobble signal. A PLL oscillation circuit (,) provides a clock signal in synchronization with the wobble signal. Data is modulated by a modulation circuit (,) according to the clock signal and a timing signal based on the address signal, and recorded on the digital disk (,). In reproduction, a RF signal in the wobble signal is converted into a digital signal by an A/D converter (,). The signal is demodulated by a demodulation circuit (,) for data output.

Digital disk recording and reproduction apparatus

Digital recording method, digital disk, digital disk recording device, and digital disk reproducing device

A digital modulator which inputs a data stream to convert to a channel bit stream. The multiplexed data block is generated by multiplexing dummy data to any position within each data block cut out of the data stream one by one. The first Reed-Solomon code is generated by Reed-Solomon-encoding the multiplexed data block as an information part. A plurality of second Reed-Solomon codes are generated by adding a plurality of Reed-Solomon codes for scrambling each of which has identification data showing its scrambling pattern in the same position as that of the dummy data, and the code length of information part and parity part is the same as the first Reed-Solomon code. The second Reed-Solomon code in which the characteristics becomes desirable after modulation among the plurality of the second Reed-Solomon codes is set for output.

Digital modulation and demodulation

A digital modulation circuit which minimizes a DC component of an NRZI modulated code sequence while setting the T.sub.max and T.sub.W not to be varied. An m-n coding mode is determined for each data block composed of the predetermined number of m-bit datawords. That is, an m-n coding mode which minimizes the absolute value of the DSV is selected and the selected m-n coding mode is utilized for the m-n coding of the current data block. The code indicating the selected m-n coding mode is multiplexed to the m-n coded current block. An m--m mapping table is also determined for each data block. That is, such an m--m mapping table that minimizes the absolute value of the DSV is selected and the selected m--m mapping table is utilized for the m--m translation of the current data block. Then, the m--m mapped data block is m-n translated into a code block composed of the same number of n-bit codewords by utilizing the single m-n translation table.

Digital modulation circuit and digital demodulation circuit

Several different types of look-up tables are available in the present invention. That is, one look-up table is selected for each m-bit dataword according to the number of consecutive 0's at lower digits, which include a lowermost digit, of the n-bit codeword preceding thereto and the encoding is performed by using the selected look-up table. Furthermore, the bit-pattern at the lower digits, which include a lowermost digit, of a current n-bit codeword is replaced according to the number of consecutive 0's at upper digits, which include an uppermost digit, of the n-bit codeword following thereafter.

Encoding circuit and decoding circuit

A method of fabricating a semiconductor integrated circuit comprises the steps of: forming buried layers in predetermined regions of a semiconductor substrate; forming an epitaxial layer covering the substrate and the buried layers; forming isolation regions dividing the epitaxial layer into a plurality of islands; selectively implanting ions to form a base region of a vertical bipolar transistor in a surface layer of one island and simultaneously to form a resistor region in a surface layer of another island; and selectively diffusing impurities into a surface layer of the base region, to form an emitter region of the vertical bipolar transistor.

Method of fabricating a semiconductor integrated circuit

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Nagoya, Japan

Nobuo Itoh