Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Matsushita Electronics Corporation

Matsushita Electrical Industrial Co., Ltd.

Nobuo Aoi

Tetsuya Ueda

Eiji Tamaoka

Gaku Sugahara

Hideo Nakagawa

Kazuyuki Sawada

Koji Arai

Atsushi Ikeda

Akemi Kawaguchi

Masaru Sasago

Yoshihiro Mori

Minoru Kubo

Takeshi Kawabata

Takashi Yui

Toshio Fujii

Yoshinao Harada

A lamination structure includes a first semiconductor chip and a second semiconductor chip stacked via a bonding section so that a rear surface of the first semiconductor chip faces the main surface of the second semiconductor chip. At least a part of a side surface of the first semiconductor chip are covered with a first resin, a distribution layer is formed on the plane formed of the main surface of the first semiconductor chip and a surface of the first resin. At least part of electrodes existing in the main surface of the second semiconductor chip is electrically connected to at least part of first external electrodes formed on the distribution layer via the penetration electrodes that penetrate the first semiconductor chip.

Semiconductor device having stacked chips, a re-distribution layer, and penetration electrodes

A semiconductor device includes a first substrate; a plurality of first electrodes formed on the first substrate; and a first insulating film formed on sidewalls of the plurality of first electrodes. The first insulating film is formed not to fill spaces between the plurality of first electrodes.

Semiconductor device

A semiconductor device includes: an active region located in an upper portion of a semiconductor substrate; a through-hole electrode penetrating the substrate, and made of a conductor having a thermal expansion coefficient larger than that of a material for the substrate; and a stress buffer region located in the upper portion of the substrate and sandwiched between the through-hole electrode and the active region. The stress buffer region does not penetrate the substrate and includes a stress buffer part made of a material having a thermal expansion coefficient larger than that of the material for the substrate and an untreated region where the stress buffer part is not present. The stress buffer part is located in at least two locations sandwiching the untreated region in a cross section perpendicular to a surface of the substrate and passing through the through-hole electrode and the active region.

The interlayer insulating film of this invention is composed of a polymer in which a first monomer having four substituted acetylenyl groups and polymerizable in the three-dimensional direction and a second monomer having two substituted cyclopentanonyl groups and polymerizable in the two-dimensional direction are three-dimensionally polymerized.

Interlayer insulating film, method for forming the same and polymer compositon

An interlayer dielectric film is made from an organic/inorganic hybrid film. The organic/inorganic hybrid film has a main chain in which a first site of siloxane and a second site of an organic molecule are alternately bonded to each other.

Interlayer dielectric film

In a method of forming an interlayer insulating film by plasma CVD, an organic siloxane compound including one or more silicon atoms each having at least three or more units each represented by a general formula, &#x2014;O&#x2014;Si(RR)&#x2014;OR(wherein Rand Rare the same as or different from each other and are a methyl group, an ethyl group or a propyl group, and Ris the same as or different from Rand Rand is a methyl group, an ethyl group, a propyl group or a phenyl group) is used as a raw material.

Method of forming an interlayer insulating film having a siloxane skeleton

In a semiconductor device including: an insulating film () formed over a substrate (); a buried metal interconnect () formed in the insulating film (); and a barrier metal film (A) formed between the insulating film () and the metal interconnect (), the barrier metal film (A) includes a metal oxide film (), a metal compound film () and a metal film () stacked in this order from a side in which the insulating film () exists to a side in which the metal interconnect () exists. Elastic modulus of the metal compound film () is larger than that of the metal oxide film ().

Semiconductor device and method for fabricating the same

After a groove is formed in an insulating layer formed on a semiconductor substrate, a barrier metal layer is formed on the insulating layer by an ALD process so as to cover the side walls and bottom of the groove, and an impurity layer is formed in or on the surface of the barrier metal layer by an ion implantation process or by an ALD process. Thereafter, the barrier metal layer and the impurity layer are alloyed, and then an inlaid interconnect layer, which is composed of a Cu seed layer and a Cu plating layer, is formed in the groove. Then, an impurity element in the alloyed barrier metal layer is thermally diffused into the inlaid interconnect layer.

Method for forming inlaid interconnect

In the multilayered interconnect structure, an upper-layer interconnect is formed in an interlayer dielectric film formed on a lower-layer interconnect of copper, and the lower-layer interconnect and the upper-layer interconnect of copper are connected to each other through a via formed in the interlayer dielectric film. A layer of the interlayer dielectric film in contact with the lower-layer interconnect is made of a layer including, as a principal component, an aromatic compound containing a nitrogen atom having a lone pair of electrons in an aromatic ring.

Multilayered interconnect structure and method for fabricating the same

A method for forming an organic/inorganic hybrid insulation film includes the following steps. An organic silicon compound containing siloxane bonds is vaporized, the vaporized organic silicon compound is transported to a reaction chamber maintaining the compound in a monomer state, and then, the organic/inorganic hybrid insulation film having a main chain structure where siloxane parts and organic molecule parts are alternately combined on a substrate installed in the reaction chamber is formed by plasma-polymerizing the vaporized organic silicon compound in the reaction chamber.

Method for forming organic/inorganic hybrid insulation film

A semiconductor device includes an insulation filmformed on a silicon substrate, a buried metal interconnectformed in the insulation film, and a barrier metal filmformed between the insulation filmand the metal interconnect. The barrier metal filmis a metal compound film. The metal compound film is characterized by including at least one of elements forming the insulation film.

Semiconductor device including a barrier metal film

A Lewis acid-base reaction is caused, in a solution, between a first monomer corresponding to a Lewis acid and a second monomer corresponding to a Lewis base, so as to generate a monomer adduct in which the first monomer and the second monomer are bonded to each other through weak electric interaction. Next, the solution including the monomer adduct is applied on a substrate so as to form a supramolecular solid thin film made of the monomer adduct. Then, the supramolecular solid thin film is heated so as to cause a polymerization reaction between the first monomer and the second monomer within the supramolecular solid thin film, thereby forming a polymer thin film.

Method for synthesizing polymeric material, method for forming polymer thin film and method for forming interlayer insulating film

The interlayer dielectric film made of a three-dimensionally polymerized polymer is formed by polymerizing: first cross-linking molecules having three or more sets of functional groups in one molecule providing a three-dimensional structure; and a second cross-linking molecule having two sets of functional groups in one molecule providing a two-dimensional structure. In the three-dimensionally polymerized polymer, dispersed are a number of molecular level pores formed by the polymerization of the first and second cross-linking molecules.

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Hyogo, Japan

Nobuo Aoi