Kabushiki Kaisha Toshiba

Toshiba Memory Corporation

Kioxia Corporation

Nobuhiro Kondo

Kenichi Maeda

Toshio Fujisawa

Shoji Sawamura

Atsushi Kunimatsu

Kenichiro Yoshii

Kenji Funaoka

Ryuzo Okada

Reina Nishino

Koichi Nagai

Daisuke Iwai

Satoshi Kaburaki

Yu Nakanishi

Akihiko Fukui

Konosuke Watanabe

Yuji Izumi

Takaya Horiki

Keigo Hara

Yaotung Kuo

Sven Hegner

Ken Hamada

According to one embodiment, a memory device includes a nonvolatile memory, a volatile memory, a controller, and a board. The nonvolatile memory stores data. The volatile memory holds a part of the data stored in the nonvolatile memory. The memory controller controls the volatile memory and the nonvolatile memory. The nonvolatile memory, the volatile memory, and the memory controller are provided on the board. The memory controller transmits an interrupt signal to a request source, when the volatile memory does not have any data corresponding to an address which the request source requests to access.

Memory controller configured to transmit interrupt signal if volatile memory has no data corresponding to address requested from source

According to one embodiment, the memory device includes a non-volatile memory, a volatile memory, and a controller. The controller carries out the transition to two different sleep states depending on a sleep instruction from the host device and saves sleep state information indicating the sleep state after the transition to the host-side storage device. Upon receiving a return instruction from the host device, the controller carries out return processing in accordance with the sleep state information stored in the host-side storage device.

Memory device, and information-processing device

According to one embodiment, there is provided an initialization apparatus connectable to a storage apparatus. The initialization apparatus including a controller configured to transmit a first command to the storage apparatus, to transmit a second command to the storage apparatus, and to transmit a third command to the storage apparatus. The first command is a command to write a first value into a first storage area in the storage apparatus. The second command is a command to copy the first value stored in the first storage area to a second storage area in the storage apparatus. The third command is a command to copy the first values stored in the first storage area and the second storage area to a third storage area in the storage apparatus.

Memory system, information processing apparatus, control method, and initialization apparatus

According to one embodiment, a memory system is connectable to a host including a first memory. The memory system includes a non-volatile second memory, a volatile third memory, and a controller. The controller uses the third memory as a work memory, and executes data transfer between the host and the second memory. The controller receives a first command to change a power mode from the host. The controller transfers first data to the first memory and transfers second data to the second memory in response to the receipt of the first command. The controller transmits a response of completion of data transfer. The first data and the second data are included in third data. The third data is data in the third memory.

Memory system

A memory system includes a memory and a command generator. The memory is connected to a host including a main memory and a processor connected to the main memory. The command generator generates an initialization command and transmits the initialization command to the host. The initialization command represents a command for instructing the initialization of the main memory and indicating an initialization method for the main memory.

Memory system, electric device, and information processing device

According to one embodiment, a memory module includes a volatile memory, a nonvolatile memory, and a controller. The volatile memory is data readable and writable. The nonvolatile memory is data readable and writable and stores therein correspondence information containing an attribute indicating any of volatile, nonvolatile, and both of volatile and nonvolatile associated with an address in an address space assigned to the volatile memory and the nonvolatile memory. The controller reads data from and writes data to the volatile memory or the nonvolatile memory, referring to the correspondence information.

Memory module, electronic device and method

According to one embodiment, a first module is responsible for protocol control in compliance with a first interface standard. A second module is provided separately from the first module and is responsible for protocol control in compliance with a second interface standard. A third module is responsible for a physical layer shared between the first interface standard and the second interface standard.

Interface circuit executing protocol control in compliance with first and second interface standards

According to one embodiment, there is provided a memory system including a nonvolatile memory, a host interface, and a controller. The host interface is configured to receive a first read command including a logical address to access the nonvolatile memory from a host system. The controller is configured to, when a size of read data requested in the first read command matches a predetermined data size, execute a process according to a second read command including a logical address sequential to the logical address included in the first read command before the host interface receives the second read command.

A memory device according to an embodiment includes a non-volatile storage device, a volatile storage device that stores saved data which is saved in the host-side storage device when a first operation mode changing process is executed by the memory device, and a control unit. The control unit transmits, to the host device, a write command that is an instruction to write the saved data to the host-side storage device and the saved data, when the first operation mode changing process is executed by the memory device.

Memory device, information-processing device and information-processing method

According to one embodiment, an information processing apparatus includes a host and a memory system. The memory system includes a nonvolatile memory. The host includes a volatile memory, a first host control unit, and a second host control unit. The volatile memory includes a first area to be used by the host and a second area as a cache memory to temporarily store data of the nonvolatile memory. The first host control unit computes a first code, and stores the first data and the first code in the second area. The first code is redundant information of the first data. The second host control unit reads second data and a second code from the second area, performs error detection on the second data based on the second code, and transfers the second data. The second code is redundant information of the second data.

Information processing apparatus

According to one embodiment, a memory device is connectable to a host device. The memory device includes a first interface unit, a controller unit, a second memory and a second interface. The first interface unit receives a write command from the host device. The controller unit acquires the write-data associated with the write command stored in a first memory area of a first memory in the host device, the write-data being copied from a second memory area of the first memory. The second interface causes the second memory to write the write-data in the second memory.

Memory device having a controller unit and an information-processing device including a memory device having a controller unit

According to embodiments a memory system is connectable to a host which includes a host controller and a host memory including a first memory area and a second memory area. The memory system includes an interface unit, a non-volatile memory, and a controller unit. The interface unit receives a read command and a write command. The controller unit writes write-data to the non-volatile memory according to the write command. The controller unit determines whether read-data requested by the read command is in the first memory area. If the read-data is in the first memory area, the controller unit causes the host controller to copy the read-data from the first memory area to the second memory area. If the read-data is not in the first memory area, the controller unit reads the read-data from the non-volatile memory and causes the host controller to store the read-data in the second memory area.

Growing community of inventors

Yokohama, Japan

Nobuhiro Kondo