Other

Sharp Kabushiki Kaisha Corporation

Nagoya University

Toyota Jidosha Kabushiki Kaisha

Kabushiki Kaisha Toyota Chuo Kenkyusho

Mitsubishi Cable Industries, Ltd.

Nobuhiko Swaki

Nobuhiko Sawaki

Yoshio Honda

Norikatsu Koide

Katsuki Furukawa

Masahito Yamaguchi

Shigetoshi Ito

Isamu Akasaki

Tomoki Ono

Hiroaki Okagawa

Rentaro Mori

Kazuyuki Tadatomo

Kensaku Yamamoto

Masafumi Hashimoto

Kazumasa Hiramatsu

Akira Kiyama

Youichiro Ohuchi

Keiji Miyashita

Hiroyuki Kano

Junji Yamamoto

Hiroya Inaoka

Masayuki Ichiyanagi

Norifumi Kameshiro

Tsuyoshi Dohkita

Yousuke Kuroiwa

Yasuyuki Yanase

Takumi Shibata

Katsunori Yahashi

Light emitters and substrates for light emitters are provided to improve light-emitting efficiency and achieve improvement in crystal quality. A light emitter includes a single-crystal substrate, an oriented microcrystal layer, and a light-emitting layer. The light-emitting layer is made of a nitride semiconductor by means of a vapor-phase growth method. In the oriented microcrystal layer, the proportion of crystals, in which one of crystal axes is oriented with respect to the single-crystal substrate, is 5-9 out of 10 crystals. An average diameter of the crystal grains of the respective crystals, contained in the oriented microcrystal layer, is 1-1,000 nm. A light emitter may be equipped with an intermediate layer, a light-emitting layer, and a clad layer. These layers are formed on the oriented microcrystal layer by a vapor-phase growth method. The light-emitting layer contains microcrystal grains whose average grain diameter is 1-1,000 nm.

Substrate for forming light-emitting layer, light emitter and light-emitting substance

A mask layer with an opening is formed on a main surface of a silicon substrate, which is exposed in the opening. Then, a hexagonal pyramidal island-shaped portion is formed from a first semiconductor nitride in the opening to complete a semiconductor element structure.

Semiconductor element structure, electron emitter and method for fabricating a semiconductor element structure

A semiconductor laser device includes a substrate and an n-GaN layer composed of a nitride semiconductor formed on the substrate. The substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the substrate, or a plane inclined within 3 degrees in an arbitrary direction from the inclined plane. The n-GaN layer is formed on the slope. On the n-GaN layer are formed a lower clad layer, an active layer, and an upper clad layer, each composed of a nitride semiconductor. The active layer has a plane orientation substantially matching the plane orientation of the main plane.

Semiconductor laser device and fabrication method thereof

A light emitting semiconductor device includes a silicon substrate and a compound semiconductor layer disposed on a main plane of the silicon substrate and represented by a general expression InGaAlN, wherein x+y+z=1, 0&#x2266;x&#x2266;1, 0&#x2266;y&#x2266;1, and 0&#x2266;z&#x2266;1. The silicon substrate has a groove having an oblique plane corresponding to a plane inclined relative to the substrate's main plane by 62 degrees or a plane inclined relative to the inclined plane in any direction within three degrees, and on the oblique plane a plurality or quantum well layers different in thickness are stacked.

Light emitting semiconductor device and method of fabricating the same

A method for producing a semiconductor light emitting device includes the steps of forming a mask layer having a plurality of openings on a surface of a silicon substrate; and forming a column-like multi-layer structure including a light emitting layer in each of the plurality of openings with nitride semiconductor materials. A width between two adjacent openings of the plurality of openings of the mask layer is 10 &mgr;m or less.

Semiconductor light emitting device and method for producing the same

A semiconductor device includes a silicon substrate and a compound semiconductor layer formed on a main plane of the silicon substrate. The compound semiconductor layer is represented by the general formula of In Ga Al N (where x&plus;y&plus;z&equals;1, 0&lE;x&lE;1, 0&lE;y&lE;1, 0&lE;z&lE;1). The silicon substrate includes a trench having as a slope a plane inclined 62 degrees from the main plane of the silicon substrate, or a plane inclined in a range within 3 degrees in an arbitrary direction from the inclined plane. The compound semiconductor layer is formed on the slope. The semiconductor device includes compound semiconductor layers represented by Al Ga In N (where x&plus;y&plus;z&equals;1, 0&lE;x&lE;1, 0&lE;y&lE;1, 0&lE;z&lE;1) on a silicon substrate. The silicon substrate has a main plane constituted by a plane in a range of &plusmn;5 degrees in an arbitrary direction from a (112) plane. The compound semiconductor layers are formed on the main plane.

Semiconductor device including an InGaAIN layer

A GaN group crystal base member comprising a base substrate, a mask layer partially covering the surface of said base substrate to give a masked region, and a GaN group crystal layer grown thereon to cover the mask layer, which is partially in direct contact with the non-masked region of the base substrate, use thereof for a semiconductor element, manufacturing methods thereof and a method for controlling a dislocation line. The manufacturing method of the present invention is capable of making a part in the GaN group crystal layer, which is above a masked region or non-masked region, have a low dislocation density.

GAN group crystal base member having low dislocation density, use thereof and manufacturing methods thereof

In organometallic vapor phase hetero-epitaxial processes for growing Al.sub.x Ga.sub.1-x N films on a sapphire substrate, the substrate is subjected to a preheat treatment of brief duration, such as less than 2 minutes, at relatively low temperatures in an atmosphere comprising Al-containing organometallic compound, NH.sub.3 and H.sub.2 gases, prior to the hetero epitaxial growth of Al.sub.x Ga.sub.1-x N films. Thus, single crystalline Al.sub.x Ga.sub.1-x N layers of high uniformity and high quality having smooth, flat surfaces are provided. Multi-layers grown according to the process of the invention are free from cracks and have preferable UV or blue light emission properties.

Process for growing III-V compound semiconductors on sapphire using a

A semiconductor device having a superlattice structure, which comprises at least one unit structure including first and third semiconductor layers as quantum well layers, and a second semiconductor layer as a barrier layer, which are arranged alternately on each other is described. The first semiconductor layer has a higher impurity concentration than the third semiconductor layer and has a quantum energy level determined by its thickness. The third semiconductor layer is of a thickness having quantum energy levels, one of which is lower than that of the first semiconductor layer and the second of which is equal to or higher than that of the first semiconductor layer. The second semiconductor layer is of a thickness which allows electrons existing at the second quantum energy level of the third semiconductor layer to transfer easily from the third to the first semiconductor layer. An increase in voltage applied to the semiconductor device causes electrons to transfer to the first semiconductor layer through the second quantum energy level of the third semiconductor layer to reduce the mobility of electrons in the first semiconductor layer, thus causing the semiconductor device to develop a negative resistance.

Negative resistance semiconductor device

Growing community of inventors

Nagoya, Japan

Nobuhiko Sawaki