Hitachi, Ltd.

Hitachi Microcomputer Engineering, Ltd.

Hitachi Ulsi Engineering Corp.

Hitachi Computer Engineering Co., Ltd.

Nobuhiko Ohno

Katsumi Ogiue

Akihisa Uchida

Toshihiko Takakura

Daisuke Okada

Shinji Nakashima

Shoji Kubono

Masaya Muranaka

Yukihide Suzuki

Makoto Morino

Sinichi Miyatake

Shoji Wada

Masahiro Ogata

Kanehide Kenmizaki

Yoshihisa Koyama

Tetsuya Kitame

Hidetomo Aoyagi

Masahiro Katayama

Seiichi Shundo

Noriyoshi Okuda

Katsuya Mizue

A defect remedy LSI mounted on a memory module, comprising: an input interface portion for capturing address and control signals, the input interface portion being the same as that of a dynamic RAM; an input/output interface portion corresponding to a data bus of a memory device comprised of a plurality of dynamic random access memories; a memory circuit to which a chip address and an X defective address of any of the plurality of random access memories are electrically written, the memory circuit being substantially made nonvolatile; a redundancy remedy RAM portion composed of a static RAM wherein a word line is selected by a compare match signal between an X address signal and the defective address of the memory circuit, the X address signal and the defective address being captured via the input interface portion, and a column is selected by a Y address signal captured via the input interface portion; a selecting portion for connecting a data input/output bus of the redundancy remedy RAM portion to an input/output circuit corresponding to a defective chip address; a data input/output portion for selectively activating an input/output circuit to be connected to a data bus corresponding to a dynamic RAM found defective; and a mask portion for outputting a control signal for putting in a high-impedance state an output pin of the defective RAM in a read operation.

Semiconductor memory system

A semiconductor integrated circuit device is provided with polycrystalline silicon filling U-grooves etched in a semiconductor substrate to form isolation regions which prevent any short-circuiting between the polycrystalline silicon and electrodes or wiring formed on the semiconductor substrate. A silicon dioxide film is formed within the U-grooves, and a silicon nitride film and a silicon dioxide film are further formed thereon. The silicon nitride film has a high hardness which suppresses the development of crystal defects in the peripheral active regions due to the expansion of the surface of the polycrystalline silicon when it is oxidized. When the surface of the polycrystalline silicon is oxidized, the oxidation proceeds along the oxide film over the nitride film, so that the whole of the oxide film is formed thickly. Therefore, the silicon nitride film and the silicon dioxide film are provided with an increased margin against the etching used for forming contact holes.

Semiconductor body, and device formed therefrom, having grooves with

Method of forming trench isolation in an integrated circuit

A read-only memory has a terminal for receiving a writing current and a data input/output terminal. In the writing operation, the writing current is supplied to the terminal which is different from the data input/output terminal. Therefore, a data output circuit can be constituted by an ECL circuit having a relatively low withstand voltage, and a selection circuit related to the reading operation is achieved by using an ECL circuit. Accordingly, the read-only memory performs the reading operation at high speeds. During the writing operation, a different selection circuit is used which can withstand high voltages.

Semiconductor memory device providing a selection circuit change-over

Growing community of inventors

Tokorozawa, Japan

Nobuhiko Ohno