Yamaha Corporation

Murata Manufacturing Co., Ltd.

Nobuaki H Tsuji

Hirotaka Kawai

Masao Noro

Yasuomi Tanaka

Tsuyoshi Okami

Terumitsu Maeno

Takashi Mizota

Morito Morishima

Toshio Maejima

Seiji Hirade

Junya Matsuoka

Kunihiko Mitsuoka

Yuki Ueya

Yasuhiko Sekimoto

Masahiro Ito

Kunito Takahashi

Norihiro Kawagishi

Masamitsu Hirano

Masaya Suzuki

Yohei Otani

Hidekazu Ono

Hisatoshi Uchida

Toshifumi Kanno

A sound signal processing device supplies an output sound signal to an amplification device configured to supply a first sound signal to a high-frequency speaker and a low-frequency speaker. The sound signal processing device includes a high-pass filter, an amplitude limitation circuit, a low-pass filter, and a synthesis circuit. The high-pass filter removes a low-frequency component from an input sound signal to generate a high-frequency sound signal. The amplitude limitation circuit limits an amplitude of the input sound signal at or below a reference value to generate a second sound signal. The reference value corresponds to a clipping voltage of the amplification device. The low-pass filter removes a high-frequency component from the second sound signal to generate a low-frequency sound signal. The synthesis circuit synthesizes the high-frequency sound signal and the low-frequency sound signal to generate the output sound signal.

Sound signal processing device, sound system, and computer-implemented method

A MEMS device including a fixed member and a movable member supported via a resilient body. The MEMS device includes an impact alleviation mechanism provided at a position where the movable member and the fixed member collide during operation. The impact alleviation mechanism includes a stopper provided to either the fixed member or the movable member and that protrude to be parallel between sides of the two members with at least one side edge fixed to the respective member. Moreover, the impact alleviation mechanism includes an elongate protruding member provided on the other of the fixed member and the movable member. The elongate protruding member and the stopper are configured such that as collision force increases between the movable member and the fixed member during operation, an abutment area of an outer edge position of the elongate protruding member approaches the fixed side edge of the stopper.

MEMS device

A vibrator drive circuit is configured to drive a vibrator massin a prescribed vibration direction. The vibrator drive circuit includes a drive unit configured to drive a vibrator based on a reference signal SGof a predetermined frequency to cause the vibrator to vibrate in a vibration direction, a phase detector configured to detect a vibration waveform of the vibrator in the vibration direction and to output an output voltage Vcnt in accordance with a phase difference between reference signal SGand a vibration waveform thereof, and two capacitors each formed of a movable electrode provided in the vibrator and a fixed electrode provided to face the movable electrode, the output voltage Vcnt being applied to the fixed electrode. The phase detector is configured to adjust the output voltage Vcnt in accordance with the phase difference, thereby changing electrostatic force in each of the capacitors for controlling the phase difference to be 90 degrees.

Vibrator drive circuit

A MEMS structure includes a planar substrate, a support body coupled to the planar substrate, a fixed electrode coupled to the planar substrate and a moveable portion. The movable portion is spaced from and faces the fixed electrode. The movable electrode includes a movable weight and an intermediate frame surrounding an outer edge of the movable weight. A plurality of elastic supports connect the movable weight to the intermediate frame. The elastic supports are elastically deformable in a first direction extending parallel to the plane of the substrate such that the movable weight can move in the first direction. At least one torsion bar pivotally connects one end of the intermediate frame to the support body so as to allow the intermediate frame, and with it the movable weight, to pivot around an axis which extends parallel to the plane of the substrate and perpendicular to the first direction.

MEMS structure

A power amplifying circuit includes a first field effect transistor and a second field effect transistor that are connected in series, are interposed between a high potential power line and a low potential power line, and drive a load; a predriver that generates, in response to an input signal, gate voltages applied to the first field effect transistor and the second field effect transistor respectively; and a variable power source that supplies source voltages to the high potential power line and the low potential power line respectively, and is configured to control the source voltages.

Power amplifying circuit, DC-DC converter, peak holding circuit, and output voltage control circuit including the peak holding circuit

A voltage generation circuit includes a voltage detection circuit that generates a detection voltage according to an output voltage, a reference voltage generation circuit that generates a reference voltage which changes periodically, a comparison circuit that generates a control signal according to a result of a comparison between the detection voltage and the reference voltage, wherein control pulses each having a pulse width according to the detection voltage are sequentially appeared in the control signal, and a driving pulse generation circuit that generates a driving pulse corresponding to the control pulse and supplies the generated driving pulse to a transistor connected to a DC power source when the pulse width of the control pulse exceeds a predetermined width, and stops generating the driving pulse when the pulse width of the control pulse becomes smaller than the predetermined width.

Voltage generation circuit

A voltage adder circuit includes an amplifier circuit having a first operational amplifier and into which a first voltage is input, a circuit that supplies an output current to the amplifier circuit, and a current providing section that detects the output current of the circuit and supplies an output current equal to the output current of the circuit in magnitude so that the output current of the circuit is prevented from inputting to or outputting from the first operational amplifier through an output terminal of the first operational amplifier. A second voltage is input into the circuit.

Voltage adder circuit and D/A converter circuit

A controllerupdates data LVLm indicative of a level section of an input audio signal and controls a reference level Vr based on a signal CMP representative of a comparison result between the input audio signal and the reference level Vr, and further, controls gains of electronic volumesL andR in such a manner that these gains become such gains corresponding to the level section of the input audio signal. In this case, the level sections of the input audio signals are related to the gains in such a manner that levels of output signals of the electronic volumes do not exceed a previously set output amplitude upper limit level.

Automatic gain control circuit

A pulse monitor circuit detects the presence or non-presence of the output pulses output from an output stage circuit. The pulse monitor circuit outputs an up signal to the up/down counter when the output pulses do not exist at all and outputs a down signal to the up/down counter when the output pulses exist. The up/down counter outputs a signal for increasing the delay amount of a delay amount variable circuit when a count value is large, that is, when the output pulses disappear. In contrast, when the count value is small, that is, when the output pulses exist, the counter outputs the signal for reducing the delay amount of the delay amount variable circuit.

Class D amplifier circuit

An N-channel transistor is provided as a switch between a high potential power line and a low potential power line. A high-pass filter is constituted by a capacitor and a resistor. When a voltage between the high potential power line and the low potential power line is started to oscillate by a switching operation, the high-pass filter causes a high-pass component thereof to pass, thereby turning ON the N-channel transistor to reduce a ringing.

Semiconductor integrated circuit for realizing an amplifier having ringing reduction circuitry

A class D amplifier circuit includes a signal generation section that generates a first pulse width modulation signal and a second pulse width modulation signal based on an input signal. When a level of the input signal is zero, the signal generation section generates: the first pulse width modulation signal having a repeated first wide-width pulse signal portion, which has a wide width and a repeated first narrow-width pulse signal portion, which has a narrow width which is narrower than the wide width of the first wide-width pulse signal; and the second pulse width modulation signal having a repeated second narrow-width pulse signal portion, which has a narrow width and a repeated second wide-width pulse signal portion, which has a wide width which is wider than the narrow width of the second narrow-width pulse signal portion. A rising point in time of the second narrow-width pulse signal portion occurs after a rising point in time of the first wide-width pulse signal portion and a falling point in time of the second narrow-width pulse signal portion occurs before a falling point in time of the first wide-width pulse signal portion. A rising point in time of the first narrow-width pulse signal portion occurs after a rising point in time of the second wide-width pulse signal portion and a falling point in time of the first narrow-width pulse signal portion occurs before a falling point in time of the second wide-width pulse signal portion.

A class D amplifier includes an input unit that inputs an input signal and an integrator which includes a differential operational amplifier having an offset voltage correction function. The integrator integrates the input signal input. A pulse-width modulator modulates the integration result of the integrator to generate a pulse signal having a pulse width reflective of the integration result. An output unit outputs the pulse signal. A feedback unit superimposes a signal output from the output unit on the input signal and feeds back the superimposed signal to the integrator. An input controller selectively set the input unit to a state where no signal is input. An output controller sets a voltage of an output from the feedback unit to a constant voltage.

Offset voltage correction circuit and class D amplifier

The present invention provides a D/A converter circuit which enables D/A conversion with a high precision and can prevent occurrence of a limit cycle component in the case where an input signal is low, and can also prevent the effect of dither signal from occurring in an analog signal which is a D/A conversion result. A dither signal generation sectionoutputs a dither signal (DITHER) which is an alternating current signal and a reversal dither signal (DITHER_N) inverted from the dither signal. A DEM decoderprocesses an input digital signal including a component of the dither signal (DITHER), and outputs a plurality of lines of time-series digital signals having a density of '1' or '0' conforming to the input digital signal to be processed. An analog addition sectionconverts a plurality of lines of time-series digital signals and the reversal dither signal (DITHER_N) into an analog signal respectively and adds them, and outputs an analog signal which is a D/A conversion result.

D/A converter circuit and digital input class-D amplifier

A spectrum spreading circuit, includes a control portion that repeats a sequence in which the control portion generates a designation signal for designating all of plural frequencies in prescribed order by selecting a next frequency from the frequencies which have not been selected, and a signal generating portion that sequentially generates output signals having the designated frequencies respectively on the basis of the designation signal.

Spectrum spreading circuit

A comparator has P-channel field effect transistors that are supplied at respective gates with input voltages Vin and Vref, which are objects of comparison, and that act as a differential transistor pair; and N-channel field effect transistors that serve as current channels for respective drain currents of these two P-channel field effect transistors and that act as a current mirror circuit. The comparator outputs a drain voltage Vx of an N-channel field effect transistor as a signal showing a result of comparison between the two input voltages. An N-channel field effect transistor diode-connected to the comparator is interposed between drains of the N-channel field effect transistors.

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Hamamatsu, Japan

Nobuaki H Tsuji