Hitachi, Ltd.

Renesas Electronics Corporation

Renesas Technology Corp.

Other

Hitachi Appliances, Inc

Fujitsu Corporation

Hitachi Haramachi Electronics Co., Ltd.

Kokusai Elect. Co. Ltd.

Noboru Akiyama

Takayuki Hashimoto

Masaki Shiraishi

Nobuyoshi Matsuura

Takashi Akioka

Yasuyuki Kojima

Takashi Hirao

Masahiro Iwamura

Tomoaki Uno

Kinya Mitsumoto

Seigou Yukutake

Minehiro Nemoto

Akihiko Emori

Koji Tateno

Seigoh Yukutake

Kazuyuki Kamegaki

Takashi Sasaki

Yutaka Kobayashi

Tomokatsu Kishi

Hitoshi Hirakawa

Michitaka Ohsawa

Makoto Onozawa

Yuji Sano

Fumitaka Asami

Toyoshi Kawada

Tetsuya Kawashima

Tatsuyuki Ohta

Kazuo Yoshiikawa

Tatsumi Yamauchi

Kunihiko Suzuki

Yuji Yokoyama

Shuichi Miyaoka

Hideo Ishii

Takeshi Onaka

Tomoyuki Someya

Koichi Taniguchi

Koichi Tokushige

Noriyuki Bunkou

Keiji Sato

Hideki Miyazaki

Koyo Katsura

Kazuo Kato

Akihiko Kanouda

Mutsumi Kikuchi

Takashi Hotta

Tsunehiro Endo

Fumio Murabayashi

Shigeya Tanaka

Takashi Sase

Hiroyuki Shoji

Takuya Kinoshita

Hideo Sawamoto

Masahiro Okamura

Takaya Suzuki

Shinji Nakazato

Sadayuki Ohkuma

Takuya Ishigaki

Shinya Iida

Hideto Kazama

Koji Kawamoto

Yosuke Inoue

Hitoshi Ohura

Shoichi Ozeki

Masato Miura

Hiroyuki Hanei

Hiroo Tochikubo

Masato Fujita

Kazuhiro Shiina

Kunihoro Nunomura

The semiconductor device is included in the LED driving circuit (current regulator) of driving the LED array (with series-connected number m&#xd7;parallel-connected number n), and is formed of a plurality (n pieces) of LED driving devices of controlling a current (constant-current driving) flowing in each string. A vertical semiconductor device, for example, a vertical MOSFET is used as the LED driving device. Both of a main device functioning as a constant-current driving device and a subsidiary device functioning as a circuit-breaking switch during dimming are formed inside a chip of the device, which are formed of the vertical semiconductor devices. In a first surface of the device, each source region of the main device and the subsidiary device is formed so as to be insulated from each other through an isolation region.

Semiconductor device, LED driving circuit, and apparatus for displaying an image

In a lateral-type power MOSFET, high breakdown voltage is achieved with suppressing to increase a cell pitch, and a feedback capacity and an ON resistance are decreased. An ntype silicon region having a high resistance to be a region of maintaining a breakdown voltage is vertically provided with respect to a main surface of an ntype silicon substrate, and the ntype silicon region having the high resistance is connected to the ntype silicon substrate. Also, a conductive substance is filled through an insulating substance inside a trench formed to reach the ntype silicon substrate from the main surface of the ntype silicon substrate so as to contact with the ntype silicon region having the high resistance, and the conductive substance is electrically connected to a source electrode.

Semiconductor device, method of manufacturing the same and power-supply device using the same

In a non-isolated DC/DC converter, a reference potential for a low-side pre-driver which drives a gate of a low-side MOSFET is applied from a portion except for a main circuit passing through a high-side MOSFET and the low-side MOSFET so that a parasitic inductance between a source of the low-side MOSFET and the pre-driver is increased without increasing the sum of parasitic inductances in the main circuit and negative potential driving of the gate of the low-side MOSFET can be performed and a self turn-on phenomenon can be prevented without adding any member and changing drive system.

Semiconductor device for DC-DC converter including high side and low side semiconductor switches

In order to reduce parasitic inductance of a main circuit in a power supply circuit, a non-insulated DC-DC converter is provided having a circuit in which a power MOS&#x2022;FET for a high-side switch and a power MOS&#x2022;FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS&#x2022;FET for the high-side switch is formed by a p channel vertical MOS&#x2022;FET, and the power MOS&#x2022;FET for the low-side switch is formed by an n channel vertical MOS&#x2022;FET. Thus, a semiconductor chip formed with the power MOS&#x2022;FET for the high-side switch and a semiconductor chip formed with the power MOS&#x2022;FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad.

Semiconductor device

A technique for suppressing lowering of withstand voltage and lowering of breakdown resistance and reducing a feedback capacitance of a power MISFET is provided. A lateral power MISFET that comprises a trench region whose insulating layer is formed shallower than an HV-Nwell layer is provided in the HV-Nwell layer (drift region) formed on a main surface of a semiconductor substrate in a direction from the main surface to the inside. The lateral power MISFET has an arrangement on a plane of the main surface including a source layer (source region) and a drain layer (drain region) arranged at opposite sides to each other across a gate electrode (first conducting layer), and a dummy gate electrode (second conducting layer) that is different from the gate electrode is arranged between the gate electrode and the drain layer.

Power MISFET, semiconductor device and DC/DC converter

In a semiconductor device, a high-side driver is arranged in a region closer to a periphery of a semiconductor substrate than a high-side switch, and a low-side driver is arranged in a region closer to the periphery of the semiconductor substrate than the low-side switch. By this means, a path from a positive terminal of an input capacitor to a negative terminal of the input capacitor via the high-side switch and the low-side switch is short, a path from a positive terminal of a drive capacitor to a negative terminal of the drive capacitor via the low-side driver is short, and a path from a positive terminal of a boot strap capacitor to a negative terminal of the boot strap capacitor via the high-side driver is short, and therefore, the parasitic inductance can be reduced, and the conversion efficiency can be improved.

A power-supply control IC is included in a switching power supply which drives to turn on and off a semiconductor switching device connected to a DC power supply in series to supply a predetermined constant voltage to an external load, and is a semiconductor device including a semiconductor circuit which controls on and off of the semiconductor switching device. When a current flowing through the load is abruptly increased to cause an error voltage to exceed a predetermined first threshold voltage after the end of a PWM on-pulse generated in synchronization with a switching cycle, a second PWM on-pulse is generated within the same switching cycle. Furthermore, in a plurality of switching cycles after the switching cycle in which the second PWM on-pulse is generated, the first threshold voltage for comparison with the error voltage is switched to a second threshold voltage higher than the first threshold voltage.

Semiconductor device and power supply using the same

A semiconductor device for control applied to a constant-voltage power supply device includes a digital-analog converter circuit which outputs a reference voltage corresponding to a value of a first register with taking an output voltage of a reference voltage source as a criterial reference voltage, and generates a control signal for driving a power semiconductor device based on an output voltage of an error amplifier which differentially amplifies a feedback voltage obtained by resistive-dividing on an output voltage of the constant-voltage power supply device and the reference voltage. An analog-digital converter circuit which converts the feedback voltage to a digital value with taking the output voltage of the constant-voltage power supply device as a reference voltage is provided, and based on the output, a value of a first register is corrected so as to offset an effect of an error in voltage dividing ratio of a voltage dividing resistor circuit.

In order to reduce parasitic inductance of a main circuit in a power supply circuit, a non-insulated DC-DC converter is provided including a circuit in which a power MOS&#x2022;FET for a high-side switch and a power MOS&#x2022;FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS&#x2022;FET for the high-side switch is formed by a p-channel vertical MOS&#x2022;FET, and the power MOS&#x2022;FET for the low-side switch is formed by an n channel vertical MOS&#x2022;FET. Thus, a semiconductor chip formed with the power MOS&#x2022;FET for the high-side switch and a semiconductor chip formed with the power MOS&#x2022;FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad.

DC/DC converter package having separate logic and power ground terminals

A power supply capable of reducing loss of large current and high frequency. In an MCM for power supply in which a high-side power MOSFET chip, a low-side power MOSFET chip and a driver IC chip driving them are sealed in one sealing material (a capsulating insulation resin), a wiring length of a wiring DL connecting an output terminal of the driver IC chip to a gate terminal of the low-side power MOSFET chip or a source terminal is made shorter than a wiring length of a wiring DH connecting the output terminal of the driver IC chip to a gate terminal of the high-side power MOSFET chip or a source terminal. Further, the number of the wiring DL is made larger than the number of the wiring DH.

Parasitic inductance of the main circuit of a power source unit is reduced. In a non-insulated DC-DC converter having a circuit in which a power MOSFET for high side switch and a power MOSFET for low side switch are connected in series, the power MOSFET for high side switch and the power MOSFET for low side switch are formed of n-channel vertical MOSFETs, and a source electrode of the power MOSFET for high side switch and a drain electrode of the power MOSFET for low side switch are electrically connected via the same die pad.

Semiconductor device with circuit for reduced parasitic inductance

The vertical trench MOSFET comprises: an N type epitaxial region formed on an upper surface of an Ntype substrate having a drain electrode on a lower surface thereof; a gate trench extending from a front surface into the N type epitaxial region; a gate electrode positioned in the gate trench so as to interpose an insulator; a channel region formed on the N type epitaxial region; a source region formed on the channel region; a source electrode formed on the source region; a source trench extending from the front surface into the N type epitaxial region; and a trench-buried source electrode positioned in the source trench so as to interpose an insulator, wherein the source electrode contacts with the trench-buried source electrode.

Semiconductor device with vertical trench and lightly doped region

The object of the present invention is to reduce parasitic inductance of a main circuit in a power supply circuit. The present invention provides a non-insulated DC-DC converter having a circuit in which a power MOS&#x2022;FET for a high-side switch and a power MOS&#x2022;FET for a low-side switch are connected in series. In the non-insulated DC-DC converter, the power MOS&#x2022;FET for the high-side switch is formed by a p channel vertical MOS&#x2022;FET, and the power MOS&#x2022;FET for the low-side switch is formed by an n channel vertical MOS&#x2022;FET. Thus, a semiconductor chip formed with the power MOS&#x2022;FET for the high-side switch and a semiconductor chip formed with the power MOS&#x2022;FET for the low-side switch are mounted over the same die pad and electrically connected to each other through the die pad.

Growing community of inventors

Hitachinaka, Japan

Noboru Akiyama