Sandisk Technologies Inc.

Tsofun Algorithms Ltd.

Tsofun Algorithm Ltd.

Noam Presman

Eran Sharon

Idan Alrod

Ariel Navon

Alexander Smekhov

Eldad Meller

Simon Litsyn

Nissim Halabi

Alexander Bazarsky

Menahem Lasser

Itzhak Pomerantz

Tianhong Yan

Tz-Yi Liu

Rahav Yairi

Ilya Bekkerman

There is provided a method of recursive sequential list decoding of a codeword of a polar code comprising: obtaining an ordered sequence of constituent codes usable for the sequential decoding of the polar code, representable by a layered graph; generating a first candidate codeword (CCW) of a first constituent code, the first CCW being computed from an input model informative of a CCW of a second constituent code, the first constituent code and second constituent code being children of a third constituent code; using the first CCW and the second CCW to compute, by the decoder, a CCW of the third constituent code; using the CCW of the third constituent code to compute a group of symbol likelihoods indicating probabilities of symbols of a fourth (higher-layer) constituent code having been transmitted with a particular symbol value, and using the group of symbol likelihoods to decode the fourth constituent code.

Low latency sequential list decoding of polar codes

There is provided a method of sequential list decoding of an error correction code (ECC) utilizing a decoder comprising a plurality of processors. The method comprises: a) obtaining an ordered sequence of constituent codes usable for the sequential decoding of the ECC; b) executing, by a first processor, a task of decoding a first constituent code, the executing comprising: a. generating decoding candidate words (DCWs) usable to be selected for decoding a subsequent constituent code, each DCW associated with a ranking; b. for the first constituent code, upon occurrence of a sufficiency criterion, and prior to completion of the generating all DCWs and rankings, selecting, in accordance with a selection criterion, at least one DCW; c) executing, by a second processor, a task of decoding a subsequent constituent code, the executing comprising processing data derived from the selected DCWs to generate data usable for decoding a next subsequent constituent code.

GCC decoding and polar code successive-cancellation list decoding with decomposition into concatenated inner and outer codes

There is provided a method of obtaining one or more parity symbols (PS) of an encoding of information symbols (IS) according to a linear cyclic code, the method comprising: upon a permutation of information symbols (IS), generating data indicative of parity coefficients of a row of a generator matrix associated with the linear cyclic code, computing, for each given parity coefficient, a first data in accordance with, at least, the given parity coefficient and the first IS; updating, by the processing circuitry, for each given parity coefficient of the one or more parity coefficients, the first data, in accordance with, at least, the given parity coefficient and the respective IS; and upon meeting a parity completion criterion for a given parity coefficient, deriving a parity symbol from the respective first data, thereby obtaining the one or more parity symbols of the codeword of the linear cyclic code.

Encoding and decoding of permuted cyclic codes

A device, system and method for decoding a product code generated by encoding input data by a plurality of first and second dimension error correction codes. For each of a plurality of first dimension codewords, the first dimension input data codeword may be decoded using a first dimension error correction code and the first dimension codeword may be erased if errors are detected in the decoded first dimension codeword. For each of a plurality of second dimension codewords, the second dimension codeword may be decoded using a second dimension erasure correction code to recover an erasure in the second dimension codeword that was erased in the first dimension decoding.

Device, system and method of implementing product error correction codes for fast encoding and decoding

A device system and method is provided for early termination of a decoding process performed at a receiving user device. A user-specific message may be received, from a communication channel shared by multiple user devices. The user-specific message may include an error correction codeword generated by shifting an original codeword by an offset codeword uniquely associated with a target user device. The error correction codeword may be shifted based on an offset codeword uniquely associated with the receiving user device. The received message may begin to be decoded. If the receiving device is the target device, the offsets respectively associated therewith are equal and cancel, and the original message is decoded to completion. If, however, the receiving device is not the target device, the offsets respectively associated therewith are not equal and combine to form an above threshold decoding error and decoding is terminated before completion.

System and method for early termination of decoding in a multi user equipment environment

A method includes, in a data storage device including a resistive memory, receiving, from an external device, an erase command to erase a portion of the resistive memory. The method further includes storing shaped data at the portion of the resistive memory responsive to the erase command. Shaped data is configured to control an amount of leakage current during a read and/or write operation at one or more storage elements that are adjacent to at least one storage element of the portion of the resistive memory.

Shaped data associated with an erase operation

Head mountable camera devices, systems, and methods are disclosed.

Head mountable camera system

A device, system and method for decoding. A noisy version of an error correction codeword may be received, for example, over a noisy communication channel or retrieved from a memory device (e.g. a flash memory device). One or more symbol probabilities may be transformed, from an initial domain to a transformed domain, the symbol probabilities being one or more individual symbols of the received error correction codeword were transmitted as one or more symbols in candidate transmitted error correction codewords. In the transformed domain, a plurality of the transformed symbol probabilities may be composed to generate a combined coset probability defining the likelihood that the transmitted error correction codeword is associated with the individual symbols belongs to a particular one of a plurality of candidate cosets. A plurality of the coset probabilities for the plurality of respective cosets may be inverse transformed from the transformed domain to the initial domain.

Device, system and method for efficient coset decoder by transform

A system and method of programming user data into a memory cell includes receiving a first user data to be programmed in a memory controller, selecting a memory cell for programming the first user data and measuring at least one health characteristic of the selected memory cell. At least one programming parameter of the selected memory cell is adjusted and the first user data is programmed to the selected memory cell using the adjusted programming parameter corresponding to the selected memory cell.

Immediate feedback before or during programming

A system and method for computing MLC flash memory cell programming parameters to dynamically adjust verify voltage levels is provided. The method may use an iterative guess and check process that will result in a distribution of states, specifically a cell voltage distribution (CVD) that minimizes the cell error rate in cells encoded in interleaved error correction code (ECC) mode, and that balances the bit error rate between pages in cells encoded in non-interleaved ECC mode.

Method and system for adaptive setting of verify levels in flash memory

A data storage device includes a memory and a controller. A method includes accessing data stored at the memory to generate a first logical page. The method further includes generating a second logical page. Generating the second logical page includes accessing parity information from the memory. The parity information is associated with the first logical page. The method further includes generating a third logical page. Generating the third logical page includes modifying a first value of the first logical page based on a second bit value of the second logical page.

Error correction using multiple data sources

A storage module and low-complexity methods for assessing the health of a flash memory device are disclosed. In one embodiment, data is written to a subset of memory cells in a memory of a storage module. Error statistics for the subset of memory cells are determined, and cell error rate parameters for the memory are estimated by fitting the determined error statistics for the subset of memory cells with a parametric statistical model. Other embodiments are possible, and each of the embodiments can be used alone or together in combination.

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Givatayim, Israel

Noam Presman