Amazon Technologies, Inc.

Noam Katz

Erez Izenberg

Said Bshara

Jonathan Chocron

Amiram Lifshitz

Leah Shalev

Avigdor Segal

Nofar Mann

Noam Attias

Lev Vaskevich

Techniques to virtualize a physical hardware clock are described. The techniques may include utilizing a coefficients storage to store timestamp coefficient entries. When a timestamp request is received from a client, a selection circuit selects a timestamp coefficient entry from the coefficients storage. A compute circuit then computes a timestamp according to the client's virtualized clock based on the selected timestamp coefficient entry and a counter value of a counter that is driven by a physical clock signal.

Physical hardware clock virtualization

A clock disciplining scheme uses a pulse per second (PPS) signal that is distributed throughout a network to coordinate timing. In determining the time, jitter can occur due to latency between detection of the PPS signal and a software interrupt generated there from. This jitter affects the accuracy of the clock disciplining process. To eliminate the jitter, extra hardware is used to capture when the PPS signal occurred relative to a hardware clock counter associated with the clock disciplining software. In one embodiment, the extra hardware can be a sampling logic, which captures a state of a hardware clock counter upon PPS detection. In another embodiment, the extra hardware can initiate a counter that calculates a delay by the clock disciplining software in reading the hardware clock counter. The disciplining software can then subtract the calculated delay from a hardware clock counter to obtain the original PPS signal.

Clock synchronization in a network using a distributed pulse signal

A plurality of resource requesters may be configured to consume a resource to perform a task. Each of the plurality of resource requesters can be allocated a resource budget to consume the resource to perform the task. An arbiter can select one of the plurality of resource requesters to consume the resource based on an arbitration scheme. When a resource requester is selected, the amount of resource consumed by the resource requester can be deducted from its resource budget. When the resource requester is idle for a number of cycles when selected, the corresponding resource budget can be further reduced to account for the actual amount of resource consumed and wasted by the resource requester, which can provide fairness in resource consumption over few rounds of arbitration.

Penalty based arbitration

To support different timestamp formats, for example, for different network protocols, an integrated circuit device is provided with a memory that is programmed with multiple instruction sets associated with multiple timestamp formats. Each of the instruction sets contains instructions to generate a timestamp according to a corresponding timestamp format. A compute circuit can generate a formatted timestamp by using a base timestamp input and executing an instruction set selected from the multiple instruction sets stored in the memory.

Packet timestamp format manipulation

A technique for packet processing may include maintaining a data structure representing transport status information associated with a sliding window of sequential packets for a host system. When a packet targeted for the host system is received, a packet validation process can be performed on the packet. The packet validation process may include validating that the packet belongs to the sliding window of the sequential packets by comparing the packet serial number of the packet against the packets being expected in the sliding window. The packet validation process may also include validating that the packet is being received for the first time and is not a duplicate packet. Upon validating the packet, the packet can be placed into the host system, and the status information can be updated to indicate that the packet has been received.

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Tel Aviv, Israel

Noam Katz