Marvell Israel (misl) Ltd.

Marvell Asia Pte., Ltd.

Nitzan Dror

Lenin Patra

Jeng-Jong Douglas Chen

Yaron Kittner

Rami Zemach

Joergen P R Hofman-Bang

Alexander Martfeld

A physical layer (PHY) processor of a network device receives a timing message via an external network and generates a first timestamp using a first local-domain clock used by the PHY processor. The PHY processor transfers the timing message and the first timestamp to a packet processor of the network device via an internal communication link. The packet processor generates a second timestamp for the timing message using a domain-specific clock. The packet processor determines a delay value using the first timestamp, the delay value accounting for a time delay corresponding to the transfer of the timing message within the network device from the PHY processor to the packet processor. The packet processor adjusts the second timestamp using the delay value to generate an adjusted domain-specific timestamp for the timing message.

Timestamping for multiple synchronization domains in a network device

A physical layer (PHY) processor of a network device receives: a timing packet that includes initial timing information, and one or more indicators of one or more parameters to be used by the PHY processor for embedding timing information into the timing packet, the one or more indicators including at least i) an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded by the PHY device, ii) an indicator of a location of a field in the timing packet at which the timing information is to be embedded into the timing packet by the PHY device, and iii) an indicator of whether timing information in the timing packet needs to be updated by the PHY device. The PHY processor updates, based on the one or more indicators, the initial timing information in the timing packet.

One-step timestamping in network devices

A method for increasing accuracy of a timing protocol packet includes receiving, at a buffer of a first node, for transmission onto a transmission medium, at least one timing protocol packet among a plurality of packets, detecting that a delay-inducing phenomenon affecting a timestamp to be applied to a timing protocol packet will occur within a temporal interval, and in response to detecting that the delay-inducing phenomenon will occur within the temporal interval, preventing, during the temporal interval, application of the timestamp to the timing protocol packet and preventing transmission of the timing protocol packet onto the transmission medium until the delay-inducing phenomenon has elapsed.

Apparatus and method for preventing latency variation in timestamps of timing protocol packet transmitted through multi-lane ports

A packet processor of a network device receives a packet and a local-domain timestamp generated for the packet at a network interface of the network device based on a local-domain clock maintained by the network device. The packet processor generates a domain-specific timestamp for the packet based on a domain-specific clock maintained by the network device, and determines a delay value using the local-domain clock. The delay value accounts for a time delay experienced by the packet between a time at which the local-domain timestamp was generated at the network interface and a time, according to the local-domain clock, at which the domain-specific timestamp is generated by the packet processor. The packet processor adjusts the domain-specific timestamp based on the delay value to generate an adjusted domain-specific timestamp for the packet, and performs at least one synchronization operation using the adjusted domain-specific timestamp.

Timestamp circuitry of a network device modifies a packet by embedding a future timestamp in the packet to generate a timestamped packet. The future timestamp corresponds to a transmit time that occurs after the timestamp circuitry embeds the future timestamp in the packet. The timing information is added to the packet and the packet is then transferred to transmitter circuitry of the network device via a communication link, internal to the network device, that operates according to a media independent communication interface. Time gating circuitry of the transmitter circuitry i) holds the timestamped packet from proceeding to a network link coupled to the network device prior to a current time reaching the transmit time, and ii) releases the timestamped packet for transmission via the network link in response to the current time reaching the transmit time.

Timestamping over media independent interfaces

A network device determines whether a one-step timestamping method or a two-step timestamping method is to be used for transmission of a first packet. A first processor of the network device transfers to a second processor of the network device, i) a timing message to be included in the first packet, and ii) information that indicates the determined timestamping method. In response to the information from the first processor indicating that the one-step timestamping method is to be used, the second processor transmits the first packet with timing information embedded in the first packet. In response to the information from the first processor indicating that the two-step timestamping method is to be used, the second processor stores the timing information in a memory of the network device for subsequent inclusion in a second packet that is to be transmitted after transmitting the first packet, and transmits the first packet.

Dynamic one-step/two-step timestamping per packet in network devices

A processor of a network device receives i) a timing message and ii) a control header corresponding to the timing message. The control header includes information that indicates a timestamping method for communicating timing information corresponding to transmission of the timing message by the network device. The timestamping method is selected from a set of multiple timestamping methods that includes: i) a one-step timestamping method, and ii) a two-step timestamping method. The processor determines whether the two-step timing timestamping method is to be performed based on analyzing the information in the control header. The network device transmits the timing message within a first packet and determines timing information corresponding to the transmission of the first packet. In response to determining that the timestamping method is the two-step method, the processor stores the timing information in a memory for subsequent inclusion in a second packet that is to be subsequently transmitted.

A network device comprises a network interface configured to transmit packets via a network link, and timestamp circuitry configured to modify a packet that is to be transmitted by the network interface circuitry by embedding a future timestamp in the packet. The future timestamp corresponds to a transmit time at which the packet is to be transmitted by the network interface circuitry, and the transmit time occurs after the timestamp circuitry embeds the timestamp in the packet. Time gating circuitry is configured to i) receive the packet, ii) determine when a current time indicated by a clock circuit reaches the transmit time, iii) hold the packet from proceeding to the network interface circuitry prior to the current time reaching the transmit time, and iv) release the packet in response to the current time reaching the transmit time.

Method and apparatus for transmit time timestamping

A media access control (MAC) processor of a network device receives a timing packet to be transmitted by the network device. The MAC processor generates one or more indicators to be used by a PHY device of the network device for embedding timing information into the timing packet. The one or more indicators include at least an indicator indicating that the timing packet is a type of packet into which timing information is to be embedded, an indicator of a location of a field in the timing packet at which the timing information is to be embedded, and an indicator of whether timing information in the timing packet needs to be updated. The MAC processor transfers the timing packet and the one or more indicators to the PHY device for further processing of the timing packet and subsequent transmission of the timing packet from the network device.

In a method of processing a packet header received via an input interface, a plurality of data units that collectively correspond to a header of a network packet is received. A location of a target field of the header in one or more data units among the plurality of data units is specified, and the one or more data units containing the target field are identified among the plurality of data units. The target field is processed using a local offset corresponding to the specified location of the target field in the identified one or more data units, without simultaneously storing all data units of the plurality of data units in a buffer.

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Tel Aviv, Israel

Nitzan Dror