Qualcomm Incorporated

Leland Stanford Junior University

Aquantia Corporation

Irf Semiconductor, Inc.

Niranjan Anand Talwalkar

Sanjay Kasturia

Mazhareddin Taghivand

Rainer Gaethke

Mohammad Mahdi Ghahramani

Lawrence W Yonge, Iii

James M Gardner

Roger Brockenbrough

Gregory Allen Magin

Angelica Wong

Moshe Malkin

Faisal Mahmood Shad

Burcin Baytekin

Paul Brandon Butler

Haitao Gan

Chik P Yue

S Simon Wong

A method for inductively coupled communication is described. The method includes generating a first signal. The first signal frequency is a first integer multiple of a carrier frequency for inductively coupled communication. The method also includes selecting between a standalone mode and a coexistence mode. The method further includes dividing the first signal to obtain a second signal when in standalone mode. The second signal frequency is a second integer multiple of the carrier frequency. The method additionally includes dividing the first signal to obtain a third signal when in coexistence mode. The third signal frequency is a third integer multiple of the carrier frequency. The method also includes generating an inductively coupled communication signal using at least one of the second signal and the third signal.

Systems and methods for reducing transmission interference

A system and method for calibrating digital pre-distortion in a wireless device. A pre-distortion circuit may output a first training signal while a power amplifier of the wireless device is on, to generate a first feedback signal. The first feedback signal may be fed back to the pre-distortion circuit via a receive path of the wireless device. The pre-distortion circuit may output a second training signal while the power amplifier is off, to generate a second feedback signal. The second feedback signal may be fed back to the pre-distortion circuit via the receive path. The pre-distortion circuit may then determine one or more pre-distortion coefficients based on the first and second feedback signals.

Closed loop digital pre-distortion

A method for inductively coupled communication is described. The method includes transmitting a carrier signal from a first device while receiving the carrier signal at a receiver of the first device. The method also includes determining a carrier level estimation using a loopback path on the receiver of the first device. The method further includes controlling a transmit power level of the first device based on a coupling strength with a second device as indicated by the carrier level estimation.

Systems and methods for transmit power control

A powerline communication (PLC) device can be configured to execute functionality for zero cross sampling and detection. When the PLC device is directly coupled to a high-voltage PLC network, the PLC device can comprise printed safety capacitors in series with a high-voltage input AC powerline signal to safely couple the high-voltage AC powerline signal to the low-voltage processing circuit. The PLC device can also comprise an ADC to sample a scaled AC powerline signal and to obtain zero cross information. When the PLC device is part of an embedded PLC application, dynamic loading can affect the integrity of a low voltage zero cross signal that is used to extract zero cross information. After digitizing the zero cross signal, the PLC device can execute functionality to minimize/eliminate voltage drops caused by dynamic loading and obtain the zero cross information.

Extracting zero cross information in a powerline communication device

A current-mode power amplifier is disclosed. In some embodiments, the power amplifier may include a first cascode transistor pair including a first transfer function coupled to a second cascode transistor pair including a second transfer function. The first transfer function may be an inverse of the second transfer function. The current-mode power amplifier may also include an inductive-capacitive (LC) resonant circuit to reduce the effects of gate capacitances of the first cascode transistor pair and the second cascode transistor pair. In some embodiments, the current-mode power amplifier may include a bias current controller. The bias current controller may adjust transistor bias currents based, at least in part, on an input signal received by the current-mode power amplifier.

Current-mode power amplifier

An example method for active load modulation includes determining a modulated portion and an unmodulated portion of a bit. Further, the example method includes during the modulated portion of the bit, holding a phase of a received carrier signal. In addition, the example method includes, during the unmodulated portion of the bit, synchronizing to the received carrier signal.

Active load modulation in near field communication

A switched mode, high linearity power amplifier can include a dynamic quantizer, a pulse width modulator and an output driver. In one embodiment, the dynamic quantizer can include a sigma-delta modulator configured to provide a multi-level digital signal. The pulse width modulator can receive the multi-level digital signal and provide a variable pulse width signal based, at least in part, on the multi-level digital signal. The output driver can include a class D output driver. The output driver can receive the variable pulse width signal to operate the class D output driver and provide an amplified signal. In one embodiment, the output driver can adjust the amplified signal to compensate for output errors.

Switched mode high linearity power amplifier

A clock modulator can include two configurable delay units and can receive a baseband signal and a clock signal. The two configurable delay units can generate two delayed clock signals, each with different delay amounts. The delay amounts can be based on the baseband signal. The delayed clock signals can be combined to generate a modulated clock signal. A quadrature modulated clock signal can be generated when a first clock modulator receives a first baseband signal and a first clock signal and a second clock modulator receives a second baseband signal and a second clock signal. The first clock signal can be a ninety-degree phase shifted version of the second clock signal. The modulated clock signal from the first clock modulator can be combined with the modulated clock signal from the second clock modulator to generate the quadrature modulated clock signal.

Modulation through differentially delayed clocks

In a first embodiment of the present invention, a clock recovery system is provided comprising: a phase comparator; an integrator coupled to the phase comparator; a numerically controlled oscillator coupled to the integrator; and a mixer coupled to the numerically controlled oscillator and to the phase comparator.

Clock recovery system

A QAM transmitter is disclosed that may reduce the frequency of local clock signals and/or reduce the switching frequency of driver circuits when generating a QAM output signal for transmission. The QAM transmitter may generate a number of PWM signals indicative of in-phase (I) and quadrature (Q) signal components, and then use one or more selected even-order harmonics of the PWM signals to generate the QAM output signal. Odd-order harmonics of the PWM signals may be suppressed by selectively combining the PWM signals, and any remaining unwanted even-order harmonics may be suppressed using filters.

Switched-mode high-linearity transmitter using pulse width modulation

Method and apparatus for adjusting an impedance of a substrate of a Metal-Oxide-Semiconductor (MOS) transistor by providing a bias voltage and connecting a frequency-selective circuit between the substrate and the bias voltage. The frequency-selective circuit is also provided with at least one reactive element, such as an inductive element or a capacitive element, to obtain a certain frequency-response of the frequency-selective circuit and thus adjusts the substrate impedance of the MOS transistor. The method and apparatus are compatible with standard CMOS technology and applicable to RF switches, including T/R switches for processing high-frequency analog signals.

Apparatus and method for adjusting the substrate impedance of a MOS transistor

A low-phase-noise and high-performance voltage-controlled oscillator (VCO) uses a noise-canceling differential varactor topology. An implementation includes circuitry for a fully-differential varactor-inductor oscillator for reduced noise and improved performance. Susceptibility to common-mode noise sources coupled into the varactors is reduced.

Growing community of inventors

San Jose, CA, United States of America

Niranjan Anand Talwalkar