Intel Corporation

Niran Cooray

Altug Koker

Elmoustapha Ould-Ahmed-Vall

Subramaniam M Maiyuran

Varghese George

Murali Ramadoss

Ben J Ashbaugh

Nicolas C Galoppo Von Borries

Aravindh V Anantaraman

Valentin Andrei

Sungye Kim

Vikranth Vemulapalli

Jonathan D Pearce

William B Sadler

Marian Alin Petre

Methods and apparatus relating to predictive page fault handling. In an example, an apparatus comprises a processor to receive a virtual address that triggered a page fault for a compute process, check a virtual memory space for a virtual memory allocation for the compute process that triggered the page fault and manage the page fault according to one of a first protocol in response to a determination that the virtual address that triggered the page fault is a last page in the virtual memory allocation for the compute process, or a second protocol in response to a determination that the virtual address that triggered the page fault is not a last page in the virtual memory allocation for the compute process. Other embodiments are also disclosed and claimed.

Preemptive page fault handling

Growing community of inventors

Folsom, CA, United States of America

Niran Cooray