Apple Inc.

Nir Jacob Wakrat

Daniel Jeffrey Post

Vadim Khmelnitsky

Matthew John Byom

Anthony Fai

Kenneth Louis Herman

Nicholas Seroff

Tahoma Madrone Toelkes

Christopher P Dudte

Michael J Cornwell

Alexander C Sanks

Mark Alan Helm

Barry J Corlett

Michael J Smith

Hsiao Thio

Dominic Benjamin Giampaolo

Andrew W Vogan

Eric Brandon Tamura

David John Yeh

Hari Hara Kumar Maharaj

Nick Seroff

Nicholas C Seroff

Systems and methods are provided for obtaining and using nonvolatile memory ('NVM') health information. Health information can include a variety of information associated with the performance and reliability of portions of an NVM device, such as the number of errors detected in a portion of NVM or the amount of time required to read from or program a portion of nonvolatile memory. During operation, address specific health information may be stored passively on a host device and provided as part of a command to a memory controller. The memory controller may extract the health information from the command and use the information to execute access requests. After an access request is completed, the memory controller can update the health information and transmit the information back to the host device.

Systems and methods for obtaining and using nonvolatile memory health information

Systems and methods are disclosed for efficient buffering for a system having non-volatile memory ('NVM'). In some embodiments, a control circuitry of a system can use heuristics to determine whether to perform buffering of one or more write commands received from a file system. In other embodiments, the control circuitry can minimize read energy and buffering overhead by efficiently re-ordering write commands in a queue along page-aligned boundaries of a buffer. In further embodiments, the control circuitry can optimally combine write commands from a buffer with write commands from a queue. After combining the commands, the control circuitry can dispatch the commands in a single transaction.

Efficient buffering for a system having non-volatile memory

Systems and methods are disclosed for configuring a non-volatile memory ('NVM'). In some embodiments, each block of the NVM can include a block table-of-contents ('TOC'), which can be encoded (e.g., run-length encoded) and dynamically-sized. Thus, as user data is being programmed to a block, the size of a block TOC can be concurrently recalculated and increased only if necessary. In some embodiments, the NVM interface can use a weave sequence stored in the context information and at least one weave sequence associated with each page of a block to determine whether to replay across the pages of the block after system boot-up.

Systems and methods for configuring non-volatile memory

Systems and methods are provided for unmapping unused logical addresses at mount-time of a file system. An electronic device, which includes a non-volatile memory ('NVM'), may implement a file system that, at mount-time of the NVM, identifies all of the logical addresses associated with the NVM that are unallocated. The file system may then pass this information on to a NVM manager, such as in one or more unmap requests. This can ensure that the NVM manager does not maintain data associated with a logical address that is no longer needed by the file system.

Mount-time unmapping of unused logical addresses in non-volatile memory systems

Systems and methods are disclosed for generating efficient reads for a system having non-volatile memory ('NVM'). A read command can be separated by a host processor of the system into two phases: a) transmitting a command to a storage processor of the system, where the command is associated with one or more logical addresses, and b) generating data transfer information. The host processor can generate the data transfer information while the storage processor is processing the command from the host processor. Once the data transfer information has been generated and data has been read from the NVM, the data can be transferred.

Generating efficient reads for a system having non-volatile memory

Systems and methods are disclosed for logical block address ('LBA) bitmap usage for a system having non-volatile memory ('NVM'). A bitmap can be stored in volatile memory of the system, where the bitmap can store the mapping statuses of one or more logical addresses. By using the bitmap, the system can determine the mapping status of a LBA without having to access the NVM. In addition, the system can update the mapping status of a LBA with minimal NVM accesses. By reducing the number of NVM accesses, the system can avoid triggering a garbage collection process, which can improve overall system performance.

LBA bitmap usage

Systems and methods are disclosed for providing a weave sequence counter ('WSC') for non-volatile memory ('NVM') systems. The WSC can identify the sequence in which each page of the NVM is programmed. The &#x201c;weave&#x201d; aspect can refer to the fact that multiple blocks can be open for programming at once, thus allowing the pages of these blocks to be programmed in a &#x201c;woven&#x201d; manner. Systems and methods are also disclosed for providing a host weave sequence counter (&#x201c;HWSC&#x201d;). Each time new data is initially programmed to the NVM, this data can be associated with a particular HWSC. The HWSC associated with the data may not change, even when the data is moved to a new page (e.g., for wear leveling purposes and the like). The WSC and HWSC may aid in, for example, performing rollback, building logical-to-physical mappings, determining static-versus-dynamic page statuses, and performing maintenance operations (e.g., wear leveling).

Weave sequence counter for non-volatile memory systems

Systems and methods are provided for testing a non-volatile memory, such as a flash memory. The non-volatile memory may be virtually partitioned into a test region and a general purpose region. A test application may be stored in the general purpose region, and the test application can be executed to run a test of the memory locations in the test region. The results of the test may be stored in the general purpose region. At the completion of the test, the test results may be provided from the general purpose region and displayed to a user. The virtual partitions may be removed prior to shipping the electronic device for distribution.

Test partitioning for a non-volatile memory

Systems and methods are disclosed for dynamically allocating power for a system having non-volatile memory. A power budgeting manager of a system can determine if the total amount of power available for the system is below a pre-determined power level (e.g., a low power state). While the system is operating in the low power state, the power budgeting manager can dynamically allocate power among various components of the system (e.g., a processor and non-volatile memory).

Dynamic allocation of power budget for a system having non-volatile memory and methods for the same

Systems and methods are provided for storing data to or reading data from a non-volatile memory ('NVM'), such as flash memory, using a metadata redundancy scheme. In some embodiments, an electronic device, which includes an NVM, may also include a memory interface for controlling access to the NVM. The memory interface may receive requests to write user data to the NVM. The user data from each request may be associated with metadata, such as a logical address, flags, or other data. In response to a write request, the NVM interface may store the user data and its associated metadata in a first memory location (e.g., page), and may store a redundant copy of the metadata in a second memory location. This way, even if the first memory location becomes inaccessible, the memory interface can still recover the metadata from the backup copy stored in the second memory location.

Metadata redundancy schemes for non-volatile memories

Systems and methods are disclosed for stochastic block allocation for improved wear leveling for a system having non-volatile memory ('NVM'). The system can probabilistically allocate a block or super block for wear leveling based on statistics associated with the block or super block. In some embodiments, the system can select a set of blocks or super blocks based on a pre-determined threshold of a number of cycles (e.g., erase cycles and/or write cycles). The block or super block can then be selected from the set of super blocks. In other embodiments, the system can use a fully stochastic approach by selecting a block or super block based on a biased random variable. The biased random variable may be generated based in part on the number of cycles associated with each block or super block of the NVM.

Stochastic block allocation for improved wear leveling

Systems and methods are provided for dynamically allocating a number of bits per cell to memory locations of a non-volatile memory ('NVM') device. In some embodiments, a host may determine whether to store data in the NVM device using SLC programming or MLC programming operations. The host may allocate an erased block as an SLC block or MLC block based on this determination regardless of whether the erased block was previously used as an SLC block, MLC block, or both. In some embodiments, to dynamically allocate a memory location as SLC or MLC, the host may provide an address vector to the NVM package, where the address vector may specify the memory location and the number of bits per cell to use for that memory location.

Dynamically allocating number of bits per cell for memory locations of a non-volatile memory

Systems and methods are provided for improved communications in a nonvolatile memory ('NVM') system. The system can toggle between multiple communications channels to provide point-to-point communications between a host device and NVM dies included in the system. The host device can toggle between multiple communications channels that extend to one or more memory controllers of the system, and the memory controllers can toggle between multiple communications channels that extend to the NVM dies. Power islands may be incorporated into the system to electrically isolate system components associated with inactive communications channels.

Growing community of inventors

Los Altos, CA, United States of America

Nir Jacob Wakrat