Qualcomm Incorporated

Intel Corporation

Nir Gerber

Eugene Yasman

Sumit Mohan

Jean-Pierre Giacalone

Lior Amarilio

Xiaohua Kong

Zhi Zhu

Christian Josef Wiesner

Itamar Berman

Yair Cassuto

Dan Vardi

Lalan Jee Mishra

Changliang Wang

Stanley J Baran

Amit Gil

Sergio Kolor

Christian Gregory Sporck

Srikanth Potluri

Assaf Shacham

Terrence Brian Remple

Liron Ain-Kedem

Qixiong Bian

Anatoly Litvinov

Yossi Amon

Nabeel Achlaug

Charu Srivastava

Daniel Hyongkyu Kim

Dafna Shaool

Craig Aiken

Fernando Igartua

Ilya Sister

Andrey Semenjatshenco

Liat Bonen

Amir Borovietzky

Andrey Michael Baranovsky

Methods, apparatus, systems, and articles of manufacture are disclosed to align processing events. An example apparatus includes a comparator to compare a value of a counter to a threshold value, the threshold value associated with an amount of time to defer provision of a first or second input signal to a corresponding first or second IP device, respectively, signal deferring circuitry to defer provision of the first or second input signals to a corresponding one of the first or second IP devices based on an output of the comparator, deferral of the first or second input signals to cause alignment of first and second processing events performed by the first and second IP devices, respectively, and power controlling circuitry to cause the first and second IP devices to power down based on completion of the first and second processing events.

Methods and apparatus to align media workloads

Methods, apparatus, systems, and articles of manufacture are disclosed to improve performance of a compute device by detecting a scene change. An example apparatus includes scene change detection circuitry and interrupt circuitry. The example scene change detection circuitry is to determine a first score value for a first metric of similarity between a first image of a field of view (FOV) of an image sensor and a second image of the FOV, determine a second score value for a second metric of similarity between the first image and the second image, and compute a composite score value based on the first score value and the second score value. The example interrupt circuitry is to generate an interrupt to processor circuitry of the compute device to cause the processor circuitry to adjust a computation condition of the compute device based on the composite score.

Methods, apparatus, and articles of manufacture to improve performance of a compute device by detecting a scene change

Technologies for low-latency data streaming include a computing device having a processor that includes a producer and a consumer. The producer generates a data item, and in a local buffer producer mode adds the data item to a local buffer, and in a remote buffer producer mode adds the data item to a remote buffer. When the local buffer is full, the producer switches to the remote buffer producer mode, and when the remote buffer is below a predetermined low threshold, the producer switches to the local buffer producer mode. The consumer reads the data item from the local buffer while operating in a local buffer consumer mode and reads the data item from the remote buffer while operating in a remote buffer consumer mode. When the local buffer is above a predetermined high threshold, the consumer may switch to a catch-up operating mode. Other embodiments are described and claimed.

Technologies for jitter-adaptive low-latency, low power data streaming between device components

Systems and techniques for bi-directional negotiation for dynamic data chunking are described herein. A set of available features for a memory subsystem. The set of available features including latency of buffer locations of the memory subsystem. An indication of a first latency requirement of a first data consumer and a second latency requirement of a second data consumer may be obtained. A first buffer location of the memory subsystem for a data stream based on the first latency requirement may be negotiated with the first data consumer. A second buffer location of the memory subsystem for the data stream based on the second latency requirement may be negotiated with the second data consumer. An indication of the first buffer location may be provided to the first data consumer and an indication of the second buffer location may be provided to the second data consumer.

Bi-directional negotiation for dynamic data chunking

An apparatus and methods are disclosed for a bidirectional front-end circuit included within a system on chip (SoC). The bidirectional front-end circuit includes a differential bidirectional terminal for receiving and transmitting signals. The bidirectional front-end circuit is configured to provide a first communication path between a first controller and a connector through the differential bidirectional terminal when operating in a first mode. And, the bidirectional front-end circuit is reconfigured to provide a second communication path between a second controller and the connector through the differential bidirectional terminal when operating in a second mode.

Apparatus and methods for providing a reconfigurable bidirectional front-end interface

Enhanced communications over a Universal Serial Bus (USB) Type-C cable are disclosed. In one aspect, a link control circuit is provided in a USB host to enable one or more communication circuits in the USB host to transmit and receive protocol-specific data over a sideband use (SBU) interface according to communication protocols that may or may not be USB compliant. In another aspect, the link control circuit is provided in a USB client to enable one or more communication circuits in the USB client to transmit and receive protocol-specific data over the SBU interface according to communication protocols that may or may not be USB compliant. By configuring the USB host and the USB client to support multi-protocol communications via the SBU interface, it is possible to enable more flexible architectural design in mobile communication devices for enhanced performance and reduced costs.

Enhanced communications over a universal serial bus (USB) type-C cable

Aspects disclosed in the detailed description include scheduled universal serial bus (USB) low-power operations. In this regard, in one aspect, a USB host controller determines a low-power operation schedule for a USB client device. The low-power operation schedule comprises one or more scheduled low-power operation periods, each corresponding to a respective entry time and a respective exit time. The USB host controller communicates the low-power operation schedule to the USB client device using one or more USB standard packets. By scheduling the one or more scheduled low-power operation periods with respective entry and exit times, the USB host controller or the USB client controller is able to start and end the one or more scheduled low-power operation periods without incurring additional signaling, thus improving efficiency of the USB low-power operation. Further, by communicating the low-power operation schedule using USB standard packets, it is possible to preserve compatibility with USB standards.

Universal serial bus (USB) host and client devices for supporting scheduled low-power operations

Device identification generation in electronic devices to allow external control, such as selection or reprogramming, of device identification for bus communications identification, is disclosed. In this manner, device identifications of electronic devices coupled to a common communications bus in a system can be selected or reprogrammed to ensure they are unique to avoid bus communications collisions. In certain aspects, to select or reprogram a device identification in an electronic device, an external source can be electrically coupled to the electronic device. The external source closes a circuit with a device identification generation circuit in the electronic device. The closed circuit provides a desired electrical characteristic detectable by the device identification generation circuit. The device identification generation circuit is configured to generate a device identification as a function of the detected electrical characteristics of the closed circuit from the external source.

Device identification generation in electronic devices to allow external control of device identification for bus communications identification, and related systems and methods

Two super-speed lanes may be enabled on a single USB cable. In an exemplary, non-limiting aspect, the USB cable is a Type-C cable. In further non-limiting aspects, the super-speed lanes may be present even if there is no USB 2.0 lane present on the D+/D&#x2212; pins of the USB cable. Use of the second super-speed lane increases data throughput. Eliminating the requirement that the D+/D&#x2212; pins be used for USB 2.0 data allows greater flexibility in the use of the USB connection because audio or video data may be sent over the D+/D&#x2212; pins instead of USB 2.0 data. Further, the use of the two super-speed lanes allows a single computing element to operate as a host on one lane and a device on a second lane.

Increased data flow in universal serial bus (USB) cables

A Universal Serial Bus (USB) split cable is disclosed. In one aspect, the USB split cable provides a USB full-featured Type-C host plug for connecting to a USB Type-C receptacle in a USB host. In another aspect, the USB split cable provides a plurality of USB device plugs for connecting to a plurality of device clients, respectively. The plurality of USB device plugs can be configured individually with different data pin combinations to concurrently support different device clients. By providing the USB split cable, it is possible to support point-to-multipoint USB connection via the plurality of USB device plugs without a USB hub, thus improving mobility of the USB host while reducing costs and power consumption associated with the USB hub.

Universal serial bus (USB) split cable

Systems and methods for low voltage secure digital (SD) interfaces are disclosed. Embodiments of the present disclosure relate to systems and voltage for a lower voltage SD or SD Input/Output (SDIO) interface such as two integrated circuits. In particular, a SD or SDIO interface may be established between two SD compliant devices. While the SD compliant devices may otherwise comply with the SD standard, the voltage levels for signals passed between the SD compliant devices may be below 1.8 volts that the standard mandates. This reduced voltage is possible because the distances involved for interchip communication or the short distances involved for mobile terminal to peripheral connection are short enough that the reduced voltage is sufficient to still provide the desired signal strength at the receiver.

Systems and methods for low voltage secure digital (SD) interfaces

Systems, methods, devices, and non-transitory media of the various embodiments facilitate real time playback of a digital broadcast by enabling reduction of the amount of time a receiver device's low power mode interface with a separate computing device operates in an operational/high power mode. The receiver device may associate a stream of media packets of a digital broadcast with system time clock timestamps indicating when the media packets were received, and store the media packets in a temporary packet buffer. Periodically, a media packet burst stored in the temporary packet buffer may be sent to the separate computing device via a low power mode interface operating in an operational/high-power mode different than a low power mode. The low power mode interface may be returned to the low-power mode until the next burst of packets is sent to the separate computing device.

Using timed transport stream for receiver-side inter-device communication

Growing community of inventors

Haifa, Israel

Nir Gerber