Itt Manufacturing Enterprises, Inc.

International Telephone and Telegraph Corporation

Itt Corporation

Itt Avionics, a Division of Itt Corporation

Ning H Lu

Michael Mayor

William J Tanis

Alan N Schenberg

Maurice Leon Jezo

Charles R Ward

Peter D Steensma

Systems and methods for monitoring and classifying RF emissions in the field include storing an electronic signature map (ESM) of a selected geographic area, where the electronic signature map includes previously detected emitter closeness measures (ECMs) in the selected geographic area. The ECMs are representative of detected sources of radio frequency energy. A RF energy emission is detected, a new ECM for that RF energy emission is created, and that the new ECM is compared with the ECMs in the ESM. That comparison may help to determine whether the RF energy emission should be considered a threat.

Emitter proximity identification

Enhanced reception of transmitted signals in a communication system is achieved by synchronously combining transmissions from a cluster of transmitters at a distant receiver. The transmitters coordinate transmissions such that each substantially simultaneously transmits the same signal on the same communication channel. As a consequence of the spatial diversity of the transmitters, the transmitted signals arrive at the receiver at different times. The receiver essentially treats the different transmitted signals as though they were different multipath signals from a single transmitter. A multipath equalizer or combiner is used to determine timing offsets among the received signals, and the received signals are time aligned by phase rotating the signals in accordance with the estimated timing offsets. The time-aligned signals are then coherently combined and detected. The combined signal has a greater signal-to-noise ratio than the individual received signals, permitting detection at a greater range or with a lower bit error rate.

Methods and apparatus for synchronously combining signals from plural transmitters

A radio communication unit employs passive devices and a loop filter to receive a coded frequency modulated wakeup or synchronization signal that enables the receiving radio unit and initiates communications. The loop filter simultaneously tracks phase and frequency and provides smoothing to enable synchronization with weak signals (e.g., signals that typically do not enable a standard phase locked loop (PLL) to lock). In particular, when the communication unit is in a standby mode, the passive circuits of the present invention are receiving energy from a unit antenna and initially function as a phase locked loop (PLL) to lock onto an incoming signal. The wakeup or synchronization signal includes a series of tones at different frequencies, where the specific sequence is prearranged between the transmitting and receiving units. When each tone in the sequence has been detected by the receiving unit, the unit is enabled for communications.

Method and apparatus for securely enabling a radio communication unit from standby mode

The digital sample and hold phase detector to compare the phase relationship between input pulses and a high frequency reference clock comprises a digital counter arrangement coupled to count the high frequency reference clock to produce a digital ramp signal and a digital sampling arrangement coupled to at least the input pulses and an output of the counter arrangement to enable the input pulses to sample the digital ramp signal and produce a digital phase difference signal.

Digital sample and hold phase detector

The fractional division frequency synthesizer comprises a digital ramp generator producing a digital correction ramp controlled by a frequency control programmer; a divide by N divider coupled to an output of a voltage controlled oscillator with the divider being controlled by the program, where N is a selected one of an integer and a fraction one or greater; a digital phase detector coupled to a reference clock and the output of the divider to provide a digital phase error signal; a digital adder coupled to an output of the ramp generator and the phase detector to produce a ramp corrected digital phase error signal; and circuit arrangement coupled to an output of the adder and a control input of the controlled oscillator to convert the ramp corrected digital phase error signal to a ramp corrected analog phase error signal to control the controlled oscillator and thereby provide a controlled frequency signal at the output thereof.

Frequency synthesizer

There is described a zero IF receiver which affords to reduce offsets normally associated with quadrature mixers employed in such receivers. In order to reduce the effect of such offsets the local oscillator signal is modulated with a balanced pseudo-random phase code signal. This signal is then stripped off by means of additional mixers, one for each of the quadrature channels. The effect of the pseudo-random phase code signal is to spread the spectrum which is associated with the offsets so that the receiver can now respond to desired signals with a minimum of interference.

Zero IF radio receiver apparatus

The object of the present invention is to provide an improved convolution processor that requires no multiplication operations and can easily be implemented digitally. The convolution processor comprises a first delta analog to digital converter disposed in a first path for one of first and second input waveforms being operated on to provide a convolution function to convert signals in the first path to a digital version thereof having a delta modulation format; a second delta analog to digital converter disposed in a second path for the other of the first and second input waveforms to convert signals in this second path to a digital version thereof having the delta modulation format; a summer coupled to the output of the first and second paths and a pair of integrators coupled in any of the following manner in the above circuit; namely, in the first path, in the second path, in the first and second paths, in the output of the summer, in the first path and the output of the summer, and in the second path and the output of the summer. The convolution function is provided at the output of the summer when the pair of integrators is coupled in the first path, the second path and in the first and second paths while the convolution function output is provided at the output of at least one of the pair of integrators when the pair of integrators is coupled in the output of the summer, in the first path and the output of the summer and, in the second path and the output of the summer.

Convolution processor

The arrangement comprises a plurality of correlation means coupled to the received signal with the received signal being clocked into each of the plurality of correlation means by a different one of a plurality of different phased clocks with the different phased clocks occurring at a predetermined different time uniformly spaced over a given time interval and integration means coupled to each of the plurality of correlation means to provide the indication of the time of arrival of the received signals. The plurality of correlation means includes a plurality of shift registers into which the received signals are shifted by a different one of the plurality of phased clocks, a reference signal register and a plurality of comparison means each coupled to each stage of a different one of the plurality of shift registers and each stage of the common reference signal shift register to compare the contents of the associated stages of the plurality of signal shift registers and the single common reference signal shift register and to produce an output signal indicative of the results of each of the comparisons.

Arrangement to provide an accurate time-of-arrival indication for a

The arrangement comprises N signal channels each responsive to a different one of N signals where N is an integer greater than one. Each of the N signal channels includes a sampling circuit to sample the associated one of the N signals by a different one of N phase clocks with each of the N phase clocks sampling a different one of the N signals at a predetermined different time uniformly spaced over a given time interval. A delay means is coupled to each of the sampling circuits to time align the outputs of each of the sampling circuits so that all sampled signal pulses are time shifted consistent with the associated sampling clock phases. A correlator is coupled to the output of each of the delay means to correlate the samples of the N signals with a reference signal. The output of the correlators are integrated to provide the indication of the time of arrival of the N signals.

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Parsippany, NJ, United States of America

Ning H Lu