Sun Microsystems, Inc.

Oracle America, Inc.

Nimita Taneja

Michael Frank Deering

John E Watkins

Nathaniel David Naegle

Rahoul Puri

Elisa Rodrigues

Lisa C Grenier

Babu Rao Kandimalla

W Dean Stanton

Arvind Srinivsan

A method and apparatus for recovering from errors occurring during system bus transactions. An input/output device such as a network interface unit (NIU) issues read and write operations across a meta interface coupling the device to host bus (glue) logic. The host bus logic translates the operations into system bus transactions. The device maintains a set of reusable identifiers for identifying the operations, and a table maintained by the device or the host bus logic maps the operation identifiers to transaction identifiers identifying the system bus transactions spawned to perform the operations. If a bus transaction encounters an unrecoverable error, the host bus logic reports the error to the device and drops any further data received from other bus transactions performed for the same operation. The device marks the operation's identifier as dirty, to prevent its reuse. The operation identifier may be reused after software clears the error condition.

Method and apparatus for recovering from system bus transaction errors

A graphics system comprising a scheduling network, a sample buffer and a plurality of filtering units. The sample buffer is configured to store sample generated by a rendering engine. The plurality of filtering units are coupled in a linear series. Each filtering unit of the linear series is configured to send a request for a scanline of sample bins to a first filtering unit of the linear series. The first filtering unit is configured to service the scanline requests by sending burst requests to a scheduling network and coordinating the flow of samples forming the bursts from the sample buffer to the filtering units.

Sample request mechanism for supplying a filtering engine

A system and method are disclosed for management of sample data to enable video rate anti-aliasing convolution for interlaced video frames. Sample data may be moved simultaneously from a sample buffer to a bin scanline cache and from the bin scanline cache to an array of N processor&mdash;memory units (e.g., 25 for N&equals;5). Pixel data may be convolved from an N&times;N sample bin array that may be approximately centered on the pixel location. Since each sample bin contains N samples, N &times;N samples may be filtered for each pixel (e.g., 400 for N&equals;5 and N &equals;16). Each processor&mdash;memory unit convolves the sample data for one sample bin in the N&times;N sample bin array and supports a variety of filter functions. Pixel data may be output to a real time video data stream.

Anti-aliasing interlaced video formats for large kernel convolution

A system and method is disclosed for management of sample data to enable video rate anti-aliasing convolution. Sample data may be moved simultaneously from a sample buffer to a bin scanline cache and from the bin scanline cache to an array of N processor&mdash;memory units (e.g. 25 for N&equals;5). Pixel data may be convolved from an N&times;N sample bin array that may be approximately centered on the pixel location. Since each sample bin contains N samples, N &times;N samples may be filtered for each pixel (e.g. 400 for N&equals;5 and N &equals;16). Each processor&mdash;memory unit convolves the sample data for one sample bin in the N&times;N sample bin array and supports a variety of filter functions. Pixel data may be output to a real time video data stream.

Data management to enable video rate anti-aliasing convolution

Growing community of inventors

Castro Valley, CA, United States of America

Nimita Taneja