Advanced Micro Devices Corporation

Nikolay Fedorovich Yudanov

Juri Krieger

Systems and methodologies for programming a memory cell having a functional or selective conductive layer are provided. The functional zone can include active, and/or passive and/or barrier layers. The system includes a controller that can actively trace conditions associated with such programming. In one aspect of the present invention, by providing an external stimulus, an associated electrical or optical property associated with the memory cell is affected. Such property is then compared to a predetermined value to set/verify a programming state for the memory cell. The external stimulus can then be removed upon completion of the programming, or reduced to a verifying state to read information. The memory cell can include alternating layers of active, passive, diode, and barrier layers positioned between at least two electrodes.

Active programming and operation of a memory device

Systems and methodologies for fabrication of a memory cell or array are disclosed. The memory cell employs a functional zone with passive and active layers. Such passive and active layers facilitate electron migration, and allow a plurality of states for the memory cell. A memory device formed in accordance with the disclosed methodology can include a top-electrode formed over the functional layer, which in turn over lays a lower conductive layer.

Memory device

Disclosed are memory devices with high data reading and writing speed along with capabilities for long term storage and high information density. The memory devices allow storage of several bits of data, have fast resistance switching and require low operating voltage but at the same time allow to combine its manufacturing technology with the modern semiconductor manufacturing technology. An exemplary implementation option of the memory cell contains two continuous electrodes between which there is a multilayer functional zone consisting of one active layer, one barrier layer and one passive layer.

Memory cell

A memory cell is provided with a pair of electrodes, and an active layer sandwiched between the electrodes and including a molecular system and ionic complexes distributed in the molecular system. The active layer having a high-impedance state and a low-impedance state switches from the high-impedance state to the low-impedance state when an amplitude of a writing signal exceeds a writing threshold level, to enable writing information into the memory cell. The active layer switches from the low-impedance state to the high-impedance state when an amplitude of an erasing signal having opposite polarity with respect to the writing signal exceeds an erasing threshold level, to enable erasing information from the memory cell.

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Brookline, MA, United States of America

Nikolay Fedorovich Yudanov