Apple Inc.

Acer Cloud Technology, Inc.

Nigel R Gamble

James Michael Magee

Daniel Allen Chimene

Jeremy C Andrus

Cyril De La Cropte De Chanterac

John Gregory Dorsey

Russell Alexader Blaine

Bryan R Hinch

Andrei Dorofeev

Aditya Venkataraman

Constantin Pistol

John Princen

James S Ismail

Wilson Ho

Sandra Berndt

Miao Cui

Daniel Andreas Steffen

Kushal Dalmia

Systems and methods are disclosed for scheduling threads on a processor that has at least two different core types, such as an asymmetric multiprocessing system. Each core type can run at a plurality of selectable voltage and frequency scaling (DVFS) states. Threads from a plurality of processes can be grouped into thread groups. Execution metrics are accumulated for threads of a thread group and fed into a plurality of tunable controllers for the thread group. A closed loop performance control (CLPC) system determines a control effort for the thread group and maps the control effort to a recommended core type and DVFS state. A closed loop thermal and power management system can limit the control effort determined by the CLPC for a thread group, and limit the power, core type, and DVFS states for the system. Deferred interrupts can be used to increase performance.

Scheduler for amp architecture with closed loop performance and thermal controller

Embodiments described herein provide multi-level scheduling for threads in a data processing system. One embodiment provides a data processing system comprising one or more processors, a computer-readable memory coupled to the one or more processors, the computer-readable memory to store instructions which, when executed by the one or more processors, configure the one or more processors to receive execution threads for execution on the one or more processors, map the execution threads into a first plurality of buckets based at least in part on a quality of service class of the execution threads, schedule the first plurality of buckets for execution using a first scheduling algorithm, schedule a second plurality thread groups within the first plurality of buckets for execution using a second scheduling algorithm, and schedule a third plurality of threads within the second plurality of thread groups using a third scheduling algorithm.

Multi-level scheduling

Scheduling of work interval objects in an AMP architecture using a closed loop performance controller

Scheduler for amp architecture using a closed loop performance and thermal controller

Scheduler for AMP architecture with closed loop performance controller using static and dynamic thread grouping

Scheduler for AMP architecture with closed loop performance controller

A technique for quickly switching between a first operating system (OS) and a second OS involves deactivating the first OS and loading the second OS from dynamic memory. The technique can include inserting a context switching layer between the first OS and a hardware layer to facilitate context switching. It may be desirable to allocate dynamic memory for the second OS and preserve state of the first OS before deactivating the first OS and loading the second OS from the dynamic memory.

Operating system context switching

A technique for quickly switching between a first operating system (OS) and a second OS involves deactivating the first OS and booting the second OS from memory. The technique can include inserting a context switching layer between the first OS and a hardware layer to facilitate context switching. It may be desirable to allocate memory for the second OS and preserve state of the first OS before deactivating the first OS and booting the second OS from memory.

Growing community of inventors

San Francisco, CA, United States of America

Nigel R Gamble