Amberwave Systems Corporation

Taiwan Semiconductor Manufacturing Comp. Ltd.

Nicole Gerrish

Eugene A Fitzgerald

A method of fabricating a circuit comprising an nMOSFET includes providing a substrate, depositing a strain-inducing material comprising germanium over the substrate, and integrating a pMOSFET on the substrate, the pMOSFET comprising a strained channel having a surface roughness of less than 1 nm. The strain-inducing material is proximate to and in contact with the pMOSFET channel, the strain in the pMOSFET channel is induced by the strain-inducing material, and a source and a drain of the pMOSFET are at least partially formed in the strain-inducing material.

Method of fabricating CMOS inverter and integrated circuits utilizing strained silicon surface channel MOSFETS

A method of fabricating a CMOS inverter including providing a heterostructure having a Si substrate, a relaxed SiGelayer on the Si substrate, and a strained surface layer on said relaxed SiGelayer; and integrating a pMOSFET and an nMOSFET in said heterostructure, wherein the channel of said pMOSFET and the channel of the nMOSFET are formed in the strained surface layer. Another embodiment provides a method of fabricating an integrated circuit including providing a heterostructure having a Si substrate, a relaxed SiGelayer on the Si substrate, and a strained layer on the relaxed SiGelayer; and forming a p transistor and an n transistor in the heterostructure, wherein the strained layer comprises the channel of the n transistor and the p transistor, and the n transistor and the p transistor are interconnected in a CMOS circuit.

Method of fabricating CMOS inverter and integrated circuits utilizing strained surface channel MOSFETS

A method of fabricating a CMOS inverter including providing a heterostructure having a Si substrate, a relaxed Si Ge layer on the Si substrate, and a strained surface layer on said relaxed Si Ge layer; and integrating a pMOSFET and an nMOSFET in said heterostructure, wherein the channel of said pMOSFET and the channel of the nMOSFET are formed in the strained surface layer. Another embodiment provides a method of fabricating an integrated circuit including providing a heterostructure having a Si substrate, a relaxed Si Ge layer on the Si substrate, and a strained layer on the relaxed Si Ge layer; and forming a p transistor and an n transistor in the heterostructure, wherein the strained layer comprises the channel of the n transistor and the p transistor, and the n transistor and the p transistor are interconnected in a CMOS circuit.

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Santa Clara, CA, United States of America

Nicole Gerrish