Intel Corporation

Amazon Technologies, Inc.

Nicolas Worms

Adi Habusha

Tom Kolan

Guillermo Savransky

Ilan Wachtel

Hardware errors can be detected by generating a plurality of test templates to perform testing on an integrated circuit (IC) device. A set of random tests can be generated corresponding to the plurality of test templates. The set of random tests can be executed on the IC device for multiple passes, and the results of the multiple passes can be compared to detect the hardware error in the IC device. The set of random tests can be generated as a binary image for execution on the IC device. The IC device may include multiple processing cores, and executing the multiple passes may include changing logical role of each processing core between subsequent passes. The set of random tests can be executed in a bare-metal mode, or at an application level of the IC device.

Detecting hardware errors

Devices, systems, and methods may perform micro-operation processing with data validity tracking to determine fast or slow mode processing at a reservation station. A method includes determining whether a condition related to validity of data in a reorder buffer of an out-of-order subsystem of a processor core is met, based on a criterion other than a valid data indication from said reorder buffer. In one embodiment, in a fast mode a reservation station may dispatch micro-operations to execution and in a slow mode the reservation station may wait for a valid indication from the reorder buffer prior to dispatching the micro-operation.

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Haifa, Israel

Nicolas Worms