Stmicroelectronics (rousset) Sas

Stmicroelectronics Gmbh

Stmicroelectronics S.a.

Stmicroelectronics (grenoble 2) Sas

Nicolas Froidevaux

Laurent Lopez

Yann Bacher

Jean-Michel Gril-Maffre

John Brunel

William Thies

Jean-Pierre Leca

An oscillating analog signal includes a succession of dampened oscillations. That oscillating analog signal is conditioned to generate an output signal including only oscillations of the oscillating analog signal which have an amplitude smaller than a first threshold. The output signal is then processed by a processing unit, where the first threshold is compatible with a maximum level of voltage tolerable by the processing unit.

Conditioning integrated circuit for an inductive-capacitive flow meter

An electronic chip includes a chip core including an input terminal, an output terminal, an external pad, and an input-output circuit coupled to the chip core and the external pad. The input-output circuit includes an enable terminal coupled to the chip core, a connection terminal coupled to the external pad, a switchable diode device coupled between a supply voltage and a reference voltage, and a levelling circuit. The switchable diode device is coupled to the connection terminal and the enable terminal and is configured to operate as a diode in response to a control signal in a first state applied to the enable terminal and to operate as an open circuit in response to the control signal in a second state applied to the enable terminal. The levelling circuit is coupled to the connection terminal, the input terminal of the chip core, and the output terminal of the chip core.

Switchable diode devices having transistors in series

A device includes a first connection pin, a second connection pin, a third connection pin, and a fourth connection pin. The second connection pin is configured to be connected to a supply voltage. The fourth connection pin is configured to be coupled to a reference voltage. The device further includes a first transistor including: a first gate and a first source/drain coupled to the first connection pin; a second transistor including a second gate and a second source/drain connected to the first transistor; and a third transistor including a third gate, a third source/drain connected to the second transistor, and a fourth source/drain connected to the fourth connection pin. The third transistor is configured to be controlled by a digital signal using the third connection pin. Both the first gate and the second gate are directly connected to the second connection pin.

A microcontroller includes a core and a unit for managing the power supply of the core that includes an input for receiving an external signal indicating a leaving of a stand-by mode of operation. A signal intercepting unit intercepts the external signal and transmitting it with a delay to the unit for managing.

Stand-by mode of an electronic circuit

A method of testing a first circuit, including: a) applying a first signal between two terminals of the first circuit, the first circuit being powered off; and b) verifying that radio frequency waves transmitted by the first circuit correspond to an expected transmission.

Electronic circuit testing method and device

An integrated circuit includes peripheral conductive pads interconnected by a peripheral conductive track within an integrated circuit chip. The integrated circuit chip further includes internal conductive pads interconnected by an internal conductive track within the integrated circuit chip. A conductive bonding wire external to the integrated circuit chip connects the one peripheral conductive pad to one internal conductive pad. A package encapsulates the integrated circuit chip and the conductive bonding wire.

Distribution of electronic circuit power supply potentials

A circuit has a supply line, a reference line and circuitry coupled between the supply line and the reference line. The circuitry outputs a regulated voltage and a measurement voltage. An analog-to-digital converter (ADC) generates a digital signal indicative of variations of potential differences between the supply line and the reference line based on the regulated voltage and the measurement voltage. The generated digital signal may be used to control the circuit.

Measurement of variations of a power supply voltage

An integrated circuit is made of a semiconductor material and comprises an input and/or terminal connected to an output transistor forming a parasitic element capable of triggering itself under the effect of an electrostatic discharge applied to the terminal. The integrated circuit comprises a protection device formed so as to be biased at the same time as the parasitic element under the effect of an electrostatic discharge, and more than the parasitic element to evacuate a discharge current as a priority.

Electrostatic discharge protection device for an integrated circuit

A method produces a semiconductor circuit with an area saving in comparison to conventional circuit layouts. IO cells are arranged with a width multiplied by a factor, but with corresponding reduced height. ESD protection circuitry is included at a reduced rate in comparison to usual arrangements. The space saving is achieved by occupying a semiconductor area that would have been used by ESD circuitry with the IO circuitry. ESD protection is maintained but at different locations.

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Aix en Provence, France

Nicolas Froidevaux