Infineon Technologies Austria Ag

Infineon Technologies Ag

Nicola Vannucci

Sven Lanzerstorfer

Markus Zundel

Thomas Krotscheck Ostermann

Norbert Krischke

Hubert Maier

Mathias Racki

A transistor has a cell array with two or more transistor cells, a temperature sensor, which is integrated in the cell array or is adjacent to the cell array, and an isolation structure. The isolation structure isolates the temperature sensor from the cell array, and has an isolation trench, which is arranged between the cell array and the temperature sensor. The distance between the temperature sensor and the active transistor cell that is closest to the temperature sensor corresponds approximately to the pitch between active transistor cells within the cell array.

Transistor

The method of forming a semiconductor structure in a substrate comprises, forming a first trench with a first width Wand a second trench with a second width W, wherein the first width Wis larger than the second width W, depositing a protection material, lining the first trench, covering the substrate surface and filling the second trench and removing partially the protection material, wherein a lower portion of the second trench remains filled with the protection material.

Method of forming a semiconductor structure comprising insulating layers with different thicknesses

A method for fabricating a semiconductor structure having selective dopant regions in a semiconductor substrate having trenches formed therein I disclosed. In one embodiment, by a dopant source of an auxiliary structure, parts of the semiconductor structure which lie within the trenches are doped by means of a drive-in. In one embodiment, the semiconductor structure is patterned in planar regions outside the trenches and selectively doped by an implantation process.

Method for fabricating a semiconductor structure having selective dopant regions

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Fuernitz, Austria

Nicola Vannucci