Intel Corporation

Nick Cowley

Bernard Arambepola

Richard J Goldman

Mark S Mudd

Ruiyan Zhao

Isaac Ali

Colin Leslie Perry

Ernest T Tsui

David Albert Sawyer

Sawyer Albert David

Techniques for the reception and processing of wireless signals are disclosed. For instance, an apparatus may include a first hardware module (e.g., a mixed signal module) and a second hardware module (e.g., a digital signal module). The first hardware module may convert an analog signal corresponding to a received wireless signal into a digital signal having a first sampling rate. In turn, channel filtering may be performed on this digital signal. Following this, the filtered digital signal may be resampled from the first sampling rate to a second sampling rate. At this point, the resampled signal may be transferred across an interface from the first hardware module to the second hardware module. Upon receipt, the second hardware module may correct a sampling rate error in the second sampling rate, and demodulate the digital signal into one or more symbols.

Efficient tuning and demodulation techniques

Device, system, and method of mitigating interference to digital television signals. For example, an apparatus includes a diversity-based digital television receiver having a filter controller and at least first and second channel paths, wherein the first channel path includes a first Global System for Mobile communication (GSM) reject filter, the second channel path includes a second GSM reject filter, the second channel path is parallel to the first channel path, and the filter controller is to selectively switch an operational state of the first GSM reject filter.

Device, system, and method of mitigating interference to digital television signals

In accordance with various aspects of the disclosure, a method and apparatus for receiving multiple channels from a broadcast source and interfacing to multiple demodulators within a common silicon implementation is disclosed. A receiver apparatus is disclosed that may aggregate multiple channels output by multiple tuners into at least one composite signal. The at least one composite signal may be passed to a single ADC. The channels may then be extracted from the at least one composite signal in the digital domain prior to demodulation in separate demodulators.

Method and apparatus to support multi-channel reception

The present disclosure provides a diversity receiver. The diversity receiver includes a plurality of tuners, a plurality of demodulators operatively coupled to the plurality of tuners and a controller operatively coupled to the plurality of demodulators and the plurality of tuners. Each tuner is capable of receiving a modulated signal from a path of a plurality of distinct paths. The controller determines information for each path and computes a ratio of signal strength to an additive noise for each path based on determined information. Further, the controller adjusts power of signal in each path based on comparison of computed ratio of signal strength to additive noise with a predetermined threshold. The diversity receiver also includes a MRC circuitry operatively coupled to the plurality of demodulators and configured to combine the signal of each path for obtaining a resultant combined signal having an improved ratio of signal strength to additive noise.

Diversity receiver and method for controlling power thereof

A direct conversion receiver and a method for correcting phase imbalance including applying an input signal to an in-phase channel and a quadrature channel of the receiver. The input signal is processed by the receiver to obtain an in-phase zero intermediate frequency (IF) signal in the in-phase channel and a quadrature zero-IF signal in the quadrature channel. The in-phase zero-IF signal and the quadrature zero-IF signal are filtered to obtain a fixed band signal. A phase imbalance correction value is obtained for the fixed-band quadrature zero-IF signal as a function of the frequency of the fixed-band in-phase zero-IF signal and the fixed-band quadrature zero-IF signal. The in-phase zero-IF signal and the quadrature zero-IF signal are sampled and the phase imbalance correction value is applied using an interpolation to the sampled quadrature zero-IF signal or to the sampled in-phase zero-IF signal to correct the phase imbalance in the direct conversion receiver.

Direct conversion receiver and method for correcting phase imbalance therein

Various embodiments are directed to removing interfering signals in a broadband radio frequency (RF) receiver by implementing a silicon tuner arranged to replicate high quality factor (Q) performance without the advantages of using high Q components available for module tuners. In one or more embodiments, tuned filter elements within a broadband silicon tuner are reused to maximize the attenuation of unwanted signals while minimizing induced undesirable channel ripple. In various implementations, a number of tuned passive inductor/capacitor filter elements are combined as required such that filter elements for an unused frequency band are reconfigured to provide attenuation of and enhanced immunity to unwanted signals. Other embodiments are described and claimed.

Removing interfering signals in a broadband radio frequency receiver

Embodiments of an active bandpass filter are described. Such a filter includes a transistor; a series-tuned inductive-capacitive (LC) network (STLCN) in a common source circuit associated with the transistor to produce a tuned degenerative filtering of at least one interfering signal; and a first, variable resistance associated with the STLCN to provide a first control of a resonance quality factor (Q) associated with the filter. Other embodiments may be described and claimed.

Tunable filter apparatus, systems, and methods

An Automatic Gain Control (AGC) module for controlling Noise Figure (NF) and IM characteristics therein is disclosed. The AGC module comprises a plurality of AGC stages. Each AGC stage comprises a differential amplifier circuit, an input signal transistor and a current-steering circuit. Differential amplifier circuits of the plurality of AGC stages receive control signals at their differential inputs and their output is connected to a common load. The input signal transistors of the plurality of AGC stages receive a common input signal and is further coupled to the differential amplifier circuit and the current-steering circuit. The current-steering circuits and the control signals at the differential amplifier circuits control gain of the each AGC stage of the plurality of AGC stage, which is used to control the NF and the IM characteristics.

AGC module and method for controlling noise figure and intermodulation characteristics therein

An automatic gain control (AGC) system and method for implementing a wide dynamic range automatic gain control (AGC) are disclosed. The AGC system features a large gain adjustment suitable for integration in silicon tuners. The AGC structure employs a pair of classical current steering stages, architecturally arranged to share the gain back-off characteristic in a novel 'ping-pong' arrangement. The AGC system and method deliver a wide dynamic range at low power dissipation in radio frequency (RF) systems, but may be implemented as well in other applications.

Analog variable gain amplifier with improved dynamic range characteristics

A compound automatic gain control (AGC) circuit includes multiple AGC stages coupled with signal input nodes and signal output nodes in parallel. Each of the AGC stages has separate, individually controllable, control inputs. During gain back off, the AGC stages are backed off in sequence.

Growing community of inventors

Wiltshire, United Kingdom

Nick Cowley