International Business Machines Corporation

Nicholas Torleiv Bronn

Salvatore Bernardo Olivadese

Patryk Gumann

Sean Hart

Daniela Florentina Bogorin

Oblesh Jinka

Baleegh Abdo

Markus Brink

Jason Scott Orcutt

Jerry M Chow

Eric Peter Lewandowski

Jay Michael Gambetta

Jae-Woong Nah

Sami Rosenblatt

Martin O Sandberg

Vivekananda P Adiga

Matthias Steffen

Nicholas A Masluk

Sarunya Bangsaruntip

Dongbing Shao

Thorsten Muehge

Jared Barney Hertzberg

Mark Mattingley-Scott

A monolithic silicon Josephson junction can be fabricated from a silicon wafer using semiconductor technologies such as gas immersion laser doping and smart cut technology. Rather than using a superconducting metal for the junction electrodes, silicon that has been highly doped with boron can serve as the superconducting material for the electrodes of the Josephson junction. A region of the silicon wafer that has not been doped serves as the tunnel barrier. Fabrication of the Josephson junction does not require a metallization process since the electrodes and tunnel barrier are formed from highly doped silicon and non-doped silicon, respectively. The single-crystal structure of the resulting Josephson junction yields low two-level system (TLS) noise.

Monolithic silicon Josephson junctions for superconducting qubits

A thermalization structure is formed using a cover configured with a set of pillars, the cover being a part of a cryogenic enclosure of a low temperature device (LTD). A chip including the LTD is configured with a set of cavities, a cavity in the set of cavities having a cavity profile. A pillar from the set of pillars and corresponding to the cavity has a pillar profile such that the pillar profile causes the pillar to couple with the cavity of the cavity profile within a gap tolerance to thermally couple the chip to the cover for heat dissipation in a cryogenic operation of the chip.

Cryogenic packaging for thermalization of low temperature devices

A quantum computing system includes a dilution refrigerator having a plurality of chambers. A trapped ion computing device includes a first set of qubits in a given chamber of the plurality of chambers of the dilution refrigerator. A superconducting computing device having a second set of superconducting qubits is inside the given chamber of the plurality of chambers of the dilution refrigerator.

Trapped ion architecture in a dilution refrigerator for use with superconducting qubit systems

A quantum computer includes a refrigeration system under vacuum including a containment vessel, a qubit chip contained within a refrigerated vacuum environment defined by the containment vessel. The quantum computer further includes a plurality of interior electromagnetic waveguides and a plurality of exterior electromagnetic waveguides. The quantum computer further includes a hermetic connector assembly operatively connecting the interior electromagnetic waveguides to the exterior electromagnetic waveguides while maintaining the refrigerated vacuum environment. The hermetic connector assembly includes an exterior multi-waveguide connector, an interior multi-waveguide connector, and a dielectric plate arranged between and hermetically sealed with the exterior multi-waveguide connector and the interior multi-waveguide connector. The dielectric plate permits electromagnetic energy when carried by the interior and exterior pluralities of electromagnetic waveguides to pass therethrough.

High density microwave hermetic interconnects for quantum applications

Techniques for designing and fabricating quantum circuitry, including a coplanar waveguide (CPW), for quantum applications are presented. With regard to a CPW, a central conductor and two return conductor lines can be formed on a dielectric substrate, with one return conductor line on each side of the central conductor and separated from it by a space. The central conductor can have bridge portions that can be raised a desired distance above the substrate and base conductor portions situated between the bridge portions and in contact with the surface of the substrate; and/or portions of the substrate underneath the bridge portions of the central conductor can be removed such that the bridge portions, whether raised or unraised, can be the desired distance above the surface of the remaining substrate, and the base conductor portions can be in contact with other portions of the surface of the substrate that were not removed.

Low loss conductive line using bridged conductor

Techniques regarding determining the temperature of one or more quantum computing devices are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a temperature component that can determine a temperature of a superconducting resonator based on a frequency shift exhibited by the superconducting resonator due to a change in kinetic inductance with a change in temperature.

On-chip thermometer for superconducting quantum computing devices

A system for transmission of quantum information for quantum error correction includes an ancilla qubit chip including a plurality of ancilla qubits, and a data qubit chip spaced apart from the ancilla qubit chip, the data qubit chip including a plurality of data qubits. The system includes an interposer coupled to the ancilla qubit chip and the data qubit chip, the interposer including a dielectric material and a plurality of superconducting structures formed in the dielectric material. The superconducting structures enable transmission of quantum information between the plurality of data qubits on the data qubit chip and the plurality of ancilla qubits on the ancilla qubit chip via virtual photons for quantum error correction.

Superconducting interposer for the transmission of quantum information for quantum error correction

Techniques regarding determining and/or analyzing temperature distributions experienced by quantum computer devices during operation are provided. For example, one or more embodiments described herein can comprise a system, which can comprise a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a region component that can define a plurality of temperature regions from a quantum computing device layout. The computer executable component can also comprise a map component that can generate a map that characterizes a temperature distribution by determining at least one temperature achieved within the plurality of temperature regions during an operation of the quantum computing device layout.

Mapping temperature distribution in superconducting devices

Protecting qubits of a quantum processor from spontaneous emission and thermal photon noise includes connecting a first port of a filter to a signal line of a readout resonator of a qubit circuit of a quantum processor. The filter has a passband including a readout resonator frequency associated with the readout resonator and a first stopband including a qubit transition frequency associated with the qubit circuit. A second port of the filter is connected to a measurement device. a signal line of the filter is galvanically connected to a reference ground in thermal contact to a stage of a cryostat. The galvanic connection further makes a thermal connection to an input signal line of the qubit circuit.

Reduction of spontaneous emission and thermal photon noise in quantum computing machines using a galvanically grounded filter

Systems, computer-implemented methods, and computer program products that can facilitate determining a state of a qubit are described. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a relation determining component that can determine relation of a status signal of a quantum computing device to a noise value of the quantum computing device. The system can further include an operation time estimator that can estimate an operation time for the quantum computing device based on the relation of the status signal to the noise value.

Controlling a quantum computing device based on predicted operation time

Devices, systems, methods, and computer-implemented methods to facilitate employing thermalizing materials in an enclosure for quantum computing devices are provided. According to an embodiment, a system can comprise a quantum computing device and an enclosure having the quantum computing device disposed within the enclosure. The system can further comprise a thermalizing material disposed within the enclosure, with the thermalizing material being adapted to thermally link a cryogenic device to the quantum computing device.

Using thermalizing material in an enclosure for cooling quantum computing devices

A system includes a quantum processor includes a plurality of qubits. For each qubit, there is a circulator operative to receive a control signal and an output signal from the qubit. An isolator is coupled to an output of the circulator. A quantum-limited amplifier is coupled to an output of the isolator and configured to provide an output of the qubit. A multiplexor (MUX) is configured to frequency multiplex the outputs of at least two of the plurality of qubits as a single output of the quantum processor.

Frequency multiplexing for qubit readout

Systems and techniques that facilitate hybrid readout packaging for quantum multichip bonding are provided. In various embodiments, an interposer can have a first quantum chip and a second quantum chip. In various aspects, a readout resonator (e.g., input/output port) of one or more qubits on the first quantum chip can be routed to an inner portion of the interposer. In various instances, the inner portion can be located between the first quantum chip and the second quantum chip. In various aspects, routing the readout resonator to the inner portion can reduce a number of crossings and/or intersections between input/output lines on the interposer and connection buses between qubits on the interposer.

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Long Island City, NY, United States of America

Nicholas Torleiv Bronn