Seagate Technology Incorporated

Via-cyrix, Inc.

Nicholas Paul Mati

Bruce Douglas Buch

Jon David Trantham

Andrew T Brown

Kyaw Sin Maung

Matthew D Rench

Aaron P Weyer

A computing system can be arranged to generate a range of different frequencies with at least one oscillator of a clock module prior to providing a first clock frequency to a controller with a channel selector of the clock module in response to a dither control circuit. A system operation may be executed with the controller before the first clock frequency is changed to a second clock frequency during the execution of the system operation as directed by the dither control circuit. The second clock frequency can be chosen from the range of different frequencies. The computing system may return to the first clock frequency at the conclusion of the execution of the system operation.

Computing system with power variation attack countermeasures

First and second servo control processors are coupled to respective first and second actuators that independently position first and second heads over one or more disks of a data storage drive. The first and second servo control processors are further coupled to first and second low-latency ports. First and second unidirectional buses couple the first and second low-latency ports. The first and second unidirectional busses are operable to isochronously exchange servo positioning data between the first and second servo control processors. The first and second servo control processors each use the servo positioning data to compensate for movement caused by another of the first and second servo control processors.

Data storage drive with low-latency ports coupling multiple servo control processors

A storage device includes a solid-state storage medium having a plurality of cells adapted to store data and an analog-to-digital converter (ADC) coupled to at least one cell of the plurality of cells. The ADC includes a first operating mode having a first number of quantization levels to determine a value stored in the at least one cell based on a number of possible values represented by the at least one cell. The ADC further includes a second operating mode having a second number of quantization levels to determine the value stored in the at least one cell, where the second number of quantization levels is greater than the first number of quantization levels. The ADC selectively enables the first or the second operating mode as a selected operating mode and determines a signal representative of the value stored in the at least one cell using the selected operating mode.

Solid-state storage device including a high resolution analog-to-digital converter

An improved clock generator performs clock multiplication using selectable generation of clock edges. A clock multiplier divides an input clock period into N edges by generating N non-overlapping clock pulses synchronized to the period of the reference clock&mdash;these edges are selectably combined to produce an output clock with the desired multiplication and duty cycle. The sequence of non-overlapping pulses is synchronized to the period of the input reference clock, i.e., to the first harmonic of the reference clock. A pulse generator network includes N pulse generators PG,-PGN, with the output of each pulse generator being coupled to the input of the next pulse generator. When triggered, each pulse generator generates a pulse P with a leading edge and a trailing edge, and a pulse width determined by a selectable pulse-width delay signal. The pulse generator PG,is triggered by a leading edge of the reference clock, and the remaining pulse generators PG,-PGN are triggered by the trailing edge of the pulse P from the previous pulse generator. A synchronization circuit detects phase deviations between the trailing edge of the pulse PN from pulse generator PGN and the leading edge of the reference clock, and provides a corresponding phase adjustment signal used to adjust the pulse-width delay signal for at least one of the pulses P so as to achieve phase locking.

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Longmont, CO, United States of America

Nicholas Paul Mati