Rca Inc.

Nicholas Kucharewski

James E Gillberg

Carmine J Gentile

A gated oscillator is disclosed wherein the first period of oscillation is substantially equal to the steady state period of oscillation. The gated oscillator is of the type wherein oscillations are produced by charging and discharging a capacitor between respective first and second voltage levels. When the oscillator is stopped, the capacitor potential is maintained at the first voltage level, so that when the oscillator is started, the capacitor begins its charging cycle at the first voltage level.

Gated oscillator including initialization apparatus for enhancing

A circuit for counting pulses which may be used, for example, to provide a power on reset signal after power is applied to a circuit, employing charge transfer between two capacitors. The counter charges a first capacitor to a first voltage level between input pulses. During each input pulse, a portion of the charge stored on the first capacitor is transferred to the second capacitor. The voltage across the second capacitor increases with each input pulse. When the voltage on the second capacitor reaches a predetermined threshold level, an output signal is provided by a threshold detector to indicate that a predetermined number of input pulses has been counted. The second capacitor is then discharged in order to reset the pulse counter before beginning another counting cycle.

Pulse counter type circuit for power-up indication

An integrated circuit having circuitry for clamping input terminals that remain unconnected after assembly into a system. A transistor is connected to clamp the input terminal to reference potential and provide regenerative feedback to a NAND circuit forming a latch which maintains the transistor on when the input terminal would otherwise be left floating. Alternatively, when the terminal is connected to supply potential, the transistor is maintained 'off', precluding loss of power.

IC Clamping circuit

A gated oscillator implemented with cascade-connected inverting logic circuits and resistor-capacitor timing elements generates oscillations so long as an inhibiting signal is not applied to one of the logic circuits. Means are provided to maintain potentials on the timing elements during application of inhibiting signal, which potentials are equivalent to steady-state operating potentials at the inception of a state transition. When the inhibiting signal is discontinued allowing oscillations to be generated, the initial pulse period is equal to the steady-state pulse period.

Gated oscillator

In a drive circuit having output current passing through at least one bipolar transistor, the rise and fall times of the output current are predetermined by controlling the rate of current change in the master path of a current mirror amplifier which has a separate slave path connected to supply base current for each bipolar transistor. The drain-source channel of an MOS transistor is connected to selectively supply current flow through the master path of the current mirror amplifier in one embodiment of the rate control means and the gate of the MOS transistor is connected in parallel with a capacitor to the output of a CMOS inverter to which control signals are applied. Multiple outputs are driven from a single control input in another embodiment having a single master path and multiple slave paths incorporated into the current mirror amplifier with each slave path being connected to supply base current for a separate bipolar output transistor and being coupled to the master path through a separate transmission gate in a decoder which includes a transmission gate for each slave path.

Drive circuit for controlling current output rise and fall times

A differential-input differential-output transconductance amplifier is connected so the potential applied to a first of its input terminals, its envelope, or portions of its envelope, is followed by the potential at the second of its input terminals, either continuously or at selected times. To this end the balanced variations in the output currents of the transconductance amplifier are converted to a single-ended signal applied to the input electrode of transistor means, the output electrode of which is connected to the second input terminal of the transconductance amplifier for completing a direct-coupled feedback loop. Modifications of the basic circuit provide potential followers, voltage amplifiers, peak detectors, envelope detectors, and sample-and-hold circuits.

Electrical circuits

A current mirror amplifier (CMA) with controlled current gain, the current gain being changed, for example, responsive to the output condition of a comparator in which the CMA is used in a differential signal combining circuit. In such a comparator application the switched gain of the CMA imparts hysteresis to the comparator characteristics.

Amplifier circuit

The start-up delay of an externally synchronized astable multivibrator is reduced by placing a low impedance path between ground and the base electrode of a transistor in the input circuit to the multivibrator in response to the signal which turns on the multivibrator.

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Lebanon, NJ, United States of America

Nicholas Kucharewski