Qualcomm Incorporated

Nicholas Ka Ming Stevens-Yu

Seung Hyuk Kang

Xia Li

Rashid Ahmed Akbar Attar

Wei-Chuan Chen

Venkat Rangan

Wah Nam Hsu

Tunnel magneto-resistive (TMR) sensors employing TMR devices with different magnetic field sensitivities for increased detection sensitivity are disclosed. For example, a TMR sensor may be used as a biosensor to detect the presence of biological materials. In aspects disclosed herein, free layers of at least two TMR devices in a TMR sensor are fabricated to exhibit different magnetic properties from each other (e.g., MR ratio, magnetic anisotropy, coercivity) so that each TMR device will exhibit a different change in resistance to a given magnetic stray field for increased magnetic field detection sensitivity. For example, the TMR devices may be fabricated to exhibit different magnetic properties such that one TMR device exhibits a greater change in resistance in the presence of a smaller magnetic stray field, and another TMR device exhibits a greater change in resistance in the presence of a larger magnetic stray field.

Tunnel magneto-resistive (TMR) sensors employing TMR devices with different magnetic field sensitivities for increased detection sensitivity

Multi-level cell (MLC) static random access memory (SRAM) (MLC SRAM) cells configured to perform multiplication operations are disclosed. In one aspect, an MLC SRAM cell includes SRAM bit cells, wherein data values stored in SRAM bit cells correspond to a multiple-bit value stored in the MLC SRAM cell that serves as first operand in multiplication operation. Voltage applied to read bit line is applied to each SRAM bit cell, wherein the voltage is an analog representation of a multiple-bit value that serves as a second operand in the multiplication operation. For each SRAM bit cell, if a particular binary data value is stored, a current correlating to the voltage of the read bit line is added to a current sum line. A magnitude of current on the current sum line is an analog representation of a multiple-bit product of the first operand multiplied by the second operand.

Multi-level cell (MLC) static random access memory (SRAM) (MLC SRAM) cells configured to perform multiplication operations

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Palo Alto, CA, United States of America

Nicholas Ka Ming Stevens-Yu