Xilinx, Inc.

Forster Energy LLC

Kestrel Solutions, Inc.

Nicholas Joseph Possley

David B Upham

Austin H Lesea

Anthony Jorgenson

Jameel Hussein

Kevin Boshears

Alfred L Rodriguez

Methods and systems mitigate a soft error in an integrated circuit. A map is stored in a memory, and the map specifies a criticality class for each storage bit in the integrated circuit. A mitigative technique is associated with each criticality class. The soft error is detected in a corrupted one of the storage bits. The mitigative technique is performed that is associated with the criticality class specified in the map for the corrupted storage bit.

Classifying a criticality of a soft error and mitigating the soft error based on the criticality

Return-to-zero (RZ) formatted data is recovered and transmitted using non-return-to-zero (NRZ) devices. A NRZ clock and data recovery device (CDR) interprets the clock rate of a RZ formatted signal as twice its actual clock rate. Due to this interpretation, extra zeroes will be inserted in the data stream. The extra zeroes introduced by the NRZ interpretation of the data are discarded, and the interpreted clock rate is divided resulting in preserving the values of the original data stream of the RZ formatted signal. A NRZ encoded data stream at a specific clock rate is processed so that when the data stream is transmitted to a recipient expecting RZ formatted data, the recipient interprets the correct data.

Recovery and transmission of return-to-zero formatted data using non-return-to-zero devices

A high-speed interface for implementation in a programmable device such as, e.g., a programmable logic device ('PLD') is described. Multi-gigabit transceivers of the PLD provide transmit and receive lock signals and have inputs for reference transmit and receive clock signals. One of the multi-gigabit transceivers provides a first transmit clock signal, a first receive clock signal, and a second receive clock signal. A data rate converter fractionally multiplies a second transmit clock signal to provide the reference transmit clock signal. A skew synchronization block obtains respective transmit and receive lock signals from the multi-gigabit transceivers and provides respective receive and transmit synch adjustment signals to the multi-gigabit transceivers. Synchronous operation of the multi-gigabit transceivers in receive and transmit directions is adjusted with receive and transmit synch adjustment signals to maintain lane-to-lane skew for the high-speed interface within a target range.

High-speed interface for a programmable device

A method for scheduling channel usage for an over-the-air ('wireless') network downlink is described. Information associated with incoming traffic and outgoing traffic to a node as associated with user equipment is obtained. The user equipment is capable of establishing a communication link with the node. The information obtained is placed in respective queues, which are each associated with the user equipment. A count level of the queues is obtained. An interval rate for the incoming traffic is determined. A receive rate for the user equipment is obtained. An incoming average rate for the incoming traffic is determined. An outgoing average rate for the outgoing traffic is determined. A proportion value is generated responsive to the incoming average rate, the outgoing average rate, the receive rate, and the interval rate.

Scheduling for sharing channel access in wireless networks

Method and system for providing data transmission with transparency over the Gigabit Ethernet data stream includes receiving the 10 bit code with a data rate of 1,250 Mbits/second from the encoded 8B/10B data and arbitrarily selecting 9 bit codes using a look-up translation table which can fully represent the 10 bit codes received. The translated 9 bit codes with a data rate of 1,125 Mbits/second is then provided to eight STS-3 inverse multiplexer which inverse multiplexes the received codes into eight STS-3 data streams each with a data rate of 155.52 Mbits/second plus an offset &#x394; which are then provided to the modem for transmission to the far end via the optical transmission path.

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Gilroy, CA, United States of America

Nicholas Joseph Possley