3dlabs Inc., Ltd.

Intel Corporation

Ziilabs Inc. Ltd.

Nicholas J Murphy

Jonathan Bloomfield

John Robson

Systems, articles, and methods of context switching include requesting a transition context switch deferrable until a state to be saved is smaller than at the time the request is made, and forcing a context switch to occur if a condition is met before the request is carried out.

System and method of delayed context switching in processor registers

Architectures and methods for viewing data in multiple formats within a register file. Various disclosed embodiments allow a plurality of consecutive registers within one register file to appear to be temporarily transposed by one instruction, such that each transposed register contains one byte or word from multiple consecutive registers. A program can arbitrarily reorganize the bytes within a register by swapping the value stored in any byte within the register with the value stored in any other byte within the same register. Indirect register access is also provided, without additional scoreboarding hardware, as an apparent move from one register to another. The functionality of a hardware data FIFO at the I/O is also provided, without the power consumption of register-to-register transfers. However, the size of the FIFO can be changed under program control.

Flexible microprocessor register file

Techniques related to a processing accelerator with queue threads are described herein.

Processing accelerator with queue threads and methods therefor

The write-access control line for an RTC is combined with a clear line for an RTC signature register, so that changes to the RTC will cause subsequent reads to return an invalidity flag.

Systems, methods, software, and components using tamper-proof real-time clock

A rendering processor with texture processing capability, in which textures are retrieved from local storage as n.times.n patches. By retrieving a multi-pixel patch on each memory read, the frequency of memory accesses and page breaks in particular are reduced, resulting in a lower memory access time overhead.

Rendering system with mini-patch retrieval from local texture storage

A system and method for performing 3D graphics copying operations in such a manner as to produce both a smooth image and smooth edges. The alpha value of each pixel is used to mark the pixels which are and are not part of the image to be copied, and removes unwanted pixels from bilinear filtering operations. After filtering, the resultant alpha values along the edges of the object are used to eliminate unwanted pixels, and to blend the object into the background of the image, which reduces or eliminates the 'blocky' edges.

3D graphics object copying with reduced edge artifacts

A graphics subsystem in which a very fast clear operation is performed without the need to address each pixel, and without using memories which include a hardware fast-clear capability. This is implemented by using a reference frame counter: the window is divided up into n regions, where n is the range of the frame counter (i.e. n=2.sup.p, where p is the number of bits in the frame counter). Every time the application issues a clear command, the reference frame counter is incremented (and allowed to roll over if it exceeds its maximum value), and only the n.sup.th region is cleared. The clear updates the depth and/or stencil buffers to the new values and the frame count buffer with the reference value. This region is much smaller than the full region the application thinks it is clearing, so takes less time and hence gives the speed increase. When the local buffer is subsequently read and the frame count is found to be the same as the reference frame count, the local buffer data is used directly. The result of this arrangement is that the cost of clearing the depth and stencil buffers can be amortized over a number of clear operations (as issued by the application).

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The Sands, United Kingdom

Nicholas J Murphy