Intel Corporation

Nicholas J Denler

Jayen J Desai

Erin D Francom

Matthew R Peters

Iredamola Dammy Olopade

Sunil Gupta

Sulakshana Shyama Nath

Described is an apparatus comprising: a delay line including at least four delay stages coupled together in a series; a first multiplexer having a first input coupled to an output of a first delay stage of the at least four delay stages, and a second input coupled to an output of a third delay stage of the at least four delay stages; a second multiplexer having a first input coupled to an output of a second delay stage of the at least four delay stages, and a second input coupled to an output of a fourth delay stage of the at least four delay stages; and a phase interpolator coupled to outputs of the first and second multiplexers, the phase interpolator having an output.

Apparatus for a monotonic delay line, method for fast locking of a digital DLL with clock stop/start tolerance, apparatus and method for robust clock edge placement, and apparatus and method for clock offset tuning

A delay line has at least four delay stages coupled together in a series, two multiplexers, and a phase interpolator. The first multiplexer has a first input coupled to an output of the first delay stage, and a second input coupled to an output of the third delay stage. Similarly, the second multiplexer has a first input coupled to an output of the second delay stage, and a second input coupled to an output of the fourth delay stage. The phase interpolator is coupled to outputs of the first and second multiplexers, and has an output.

Embodiments of an electronic design automation system are generally described herein. In some embodiments, glitch-sensitive nodes in an integrated circuit design are identified. For each glitch-sensitive node, a circuit fanin cone is analyzed to look for circuit structures that can produce glitches. The integrated circuit design can be simulated and modified if the simulation indicates that a glitch would occur in the integrated circuit design.

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Beaverton, OR, United States of America

Nicholas J Denler