Rockwell Collins, Inc.

Nicholas H Bloom

Matthew P Corbett

Eric N Anderson

Timothy R Fannin

Jason R Owen

David A Miller

Brent James Nelson

James H Doty

Mark A Kovalan

James Matthew Zaehring

Angus L McLean

Daniel E Mazuk

Peter J Morgan

Charles J Sitter

Graham A Ball

Peter N Brongel

The method and corresponding system for autonomous operation may include implementing a safe system controller for autonomous vehicles to receive a set of event data for an event encountered during operation of a vehicle from a status engine of the vehicle; analyze the received set of event data; determine a vehicle system state based on the analyzed set of event data; receive a set of automation operational parameters from an automation engine of the vehicle; receive a set of autonomy operational parameters from an autonomy engine of the vehicle; determine a response to the event from the set of automation operational parameters and the set of autonomy operational parameters based on the determined vehicle system state; and provide the determined response to the automation engine and the autonomy engine to adjust an operational parameter of the vehicle.

Safe system controller for autonomous aircraft

A device for avionics full-duplex switched Ethernet (AFDX) communication can include a transmit port for transmitting AFDX data and a processor. The processor can be configured to obtain AFDX data frames for transmission over a plurality of sub-virtual links (subVLs) of a virtual link (VL), and maintain, for each of the plurality of subVLs, a corresponding data queue by storing AFDX data frames associated with that subVL in the corresponding data queue. The processor can transmit the AFDX data frames from the plurality of data queues on the plurality subVLs via the transmit port according to a scheduling policy that is based on subVL prioritization. The scheduling policy that is based on subVL prioritization can include static priority (SPn) scheduling, earliest deadline first (EDF) scheduling, or least laxity first (LLF) scheduling.

Scheduling mechanisms for end system SUBVLs

An aircraft computer system includes segregated processing elements, each executing an autonomous agent. Each autonomous agent receives a set of data pertaining to aircraft events and processes the data to identify a set of instructions for resolving the event. Each autonomous agent then compares all competing solutions to determine if each autonomous agent agrees; if so, the solution is implemented, if not, the disparity is resolved either automatically via a voting algorithm or with the intervention of a human decision maker.

Dual independent autonomous agent architecture for aircraft

Improved AFDX switches can handle various types of data traffics beyond a predefined AFDX related communication protocol. An AFDX switch can determine a mismatch between a MAC address of a received data frame and a MAC address constant specific to the predefined AFDX related protocol. In response to the mismatch, the AFDX switch can determine a data traffic type associated with the data frame based on a first portion of a header of the data frame. The AFDX switch can compare, responsive to determining a data traffic type associated with the data frame, a second portion of the header of the data frame to identifiers of a plurality of communication flows. Responsive to identifying a communication flow with a matching identifier, the AFDX switch can route the data frame based on communication flow parameters of the identified communication flow.

AFDX switch supporting multiple types of data traffic

Transparently executing applications among cores in a multi-processor system includes monitoring elements associated with each processor which align execution of threads within corresponding cores of the processors. Alignment is accomplished by monitoring system resource utilization by each core, comparing process counters associated with corresponding cores, and comparing data sets in and out during application frame switching. In a further aspect, inputs are coordinated by a synchronization element. Likewise, outputs for corresponding cores are compared to ensure no corrupted data is propagated.

High integrity multi-core processing

A decentralized Integrated Modular Avionics (IMA) architecture configured for onboard avionics processing eliminates centralized computing cabinets and distributes avionics processing capabilities to a network of smart switching devices positioned throughout the aircraft, each smart switch including a multicore processing environment (MCPE) for generalized application hosting in addition to the switching elements. The smart switching network can be scaled up or down for smaller or larger aircraft, or organically grown by adding more processing components. Additional real-time multicore processors may be located in smart remote data concentrators (RDC) for handling I/O and routing of network data between external remote units and aircraft systems and the hosted applications on the smart switches. The real-time environments executing on the smart RDCs may be reserved for low-latency closed-loop functions, or may host additional general-purpose avionics processing.

Decentralized integrated modular avionics (IMA) processing

A high-integrity multi-core heterogeneous processing environment and methods for high integrity computing on multi-core heterogeneous processing environments are disclosed. A multi-core heterogeneous processing environment may include an application processor with one or more processing cores and an integrity tester for executing integrity kernels on the application processor. The multi-core heterogeneous processing environment may further include an integrity processor having a different architecture than the application processor and an integrity manager operating on the integrity processor. The integrity manager may dynamically generate integrity kernels to test the functionality of the application processor prior to and/or subsequent to the execution of critical programs on the application processor. The integrity manager may identify one or more faults based on a result of the integrity kernel executed on the application processor and may further take corrective action based on identified faults such that an undetected fault rate remains below a selected integrity specification.

High-integrity multi-core heterogeneous processing environments

A system and related method for I/O synchronization in a high integrity multi-core processing environment (MCPE) incorporates logical computing units (LCU) of two or more homogeneous processing cores, each core running a guest operating system (GOS) and user applications such that the homogeneous cores concurrently generate the same output data (which the GOS loads to an I/O synchronization engine (IOSE)) or receive the same output data from the IOSE. The IOSE verifies data integrity by comparing the concurrently received datasets and selects a verified dataset for routing to other cores or externally to the MCPE. The IOSE receives and atomically replicates input data for synchronous transfer to, and consumption by, the user applications running on the cores of the LCU.

I/O synchronization for high integrity multicore processing

Systems and methods for automated wiring and configuration verification are disclosed. A plurality of data buses may be tested utilizing a verification method disclosed herein. The verification method may include: transmitting a unique data sequence on each particular data bus of the plurality of data buses from a transmitting unit to a receiving unit, wherein the transmitting unit and the receiving unit are connected at least in part utilizing the particular data bus; analyzing a data sequence received at the receiving unit to determine a connection correctness for the particular data bus; and reporting the connection correctness for each particular data bus of the plurality of data buses to a user. The verification method is capable of not only detecting the presence of each bus, but also verifying the integrity of the connection provided by each bus. Various types of wiring faults may be detected effectively and efficiently.

Automatic vehicle wiring and configuration verification

The present disclosure is directed to a passive optical avionics network system and method. A passive avionics network may comprise: (a) an optical line terminal (OLT); (b) at least one optical network unit (ONU); (c) a fiber optic bus operably coupling the OLT and the ONU; and (d) an avionics module operably coupled to the ONU. An integrated modular avionics (IMA) system may comprise: (a) a line-replaceable unit (LRU), the LRU comprising: (i) a processing unit; and (ii) an optical line terminal (OLT); (b) at least one optical network unit (ONU); (c) a fiber optic bus operably coupling the LRU and the ONU; and (d) an avionics module operably coupled to the ONU. A method for avionics network communication may comprise: (a) providing avionics data; (b) transmitting the avionics data via a fiber optic network; (c) receiving the avionics data; and (d) controlling functionality of an avionics module according to the avionics data.

Growing community of inventors

Marion, IA, United States of America

Nicholas H Bloom