Western Digital Technologies, Inc.

Nicholas Edward Ortmeier

Darin Edward Gerhart

Cory Lappi

William Jared Walker

Mark David Erickson

Xin Chen

Yasunobu Suginaka

Timothy Glen Hallett

Daniel Robert Lipps

Adam Christopher Geml

A method for performing an operation of a memory arrangement, comprising receiving a command at a layer of a computer system, determining if the command received is one of a first command type or a second command type, determining a type of command that is able to be received and is capable of operation of the memory arrangement, comparing the type of command capable of operation of the memory arrangement and the received command at the layer, and converting the command received at the layer to a command type capable of operation of the memory arrangement when the type of command received at the layer is different than type of command that is able to be received and is capable of operation of the memory arrangement.

Zoned block command to stream command translator

A controller of a storage device is described for handling communications with a host device. In some examples, the storage device includes a wide port comprising a plurality of phys. The wide port is configured to receive, via a first phy of the plurality of phys, a signal. The controller is configured to select, based on a respective power factor associated with each respective phy of the plurality of phys and a respective performance factor associated with each respective phy of the plurality of phys, a second phy of the plurality of phys to utilize for performing an operation associated with the received signal. In such examples, the wide port is further configured to perform, using the second phy, the operation associated with the received signal.

Intelligent wide port PHY usage

A method and arrangement are disclosed involving receiving a read-type command at a data storage arrangement, calculating a command span of the received read-type command and performing a look-up command, through use of a processor, for data located in each extent at a condensed logical block address state table for the read-type command, wherein the condensed logical block address state table describes a logical to physical table and at least one of transmitting data and displaying data related to the read-type command found in the condensed logical block address state table.

Logical and physical address field size reduction by alignment-constrained writing technique

A method and apparatus that provides a solid state drive that analyzes connection performance during I/O operations and is configured to independently modify connection performance based upon user specified input parameters without the need for host computer management.

Intelligent SAS phy connection management

A method for control of latency information through logical block addressing is described comprising receiving a computer command, performing a read flow operation on a computer buffer memory based on the computer command; populating at least one metadata frame with data based on logical block address latency information; initiating a serial attached data path transfer for one of transmitting and receiving data to the computer drive and transmitting data to a host based on the second latency.

Method using logical based addressing for latency reduction

Embodiments of the present disclosure generally relate to managing phys of a data storage target device. In one embodiment, a method of automatically managing phys of a data storage target device by a controller of the data storage device across a link reset includes transmitting a common target phy address for a plurality of target phys during a first link reset, storing the common target phy address in a non-volatile memory of the data storage device, resetting the target phys, and transmitting the stored common target phy address for the plurality of target phys during a second link reset. In another embodiment, a method of automatically managing phys of a data storage target device by a controller of the data storage device includes matching a received host address for a plurality of target phys and configuring the plurality of target phys into a wide port for the plurality of target phys with the matched received host address.

Managing phys of a data storage target device background of the disclosure

Embodiments of the present disclosure generally relate to managing phys of a data storage target device. In one embodiment, a method of managing phys of a data storage target device includes waiting to receive a host address on a target phy and transmitting a target phy address for the target phy after waiting to receive the host address on the target phy. In another embodiment, a method of managing phys of a data storage target device includes configuring a target port comprising a first target phy and reconfiguring the target port comprising a first target phy and a second target phy.

Managing phys of a data storage target device

Intelligent wide port phy usage

A device having a controller configured to execute a range crawler algorithm residing in firmware or hardware and a data table containing one or more range entries (RE's), where each of the RE's is part of a logical block address (LBA) span associated with a command instruction, and where each LBA span has one or more LBA ranges, and where each LBA range is made of one or more sequential LBA's. The device also includes a collision bitmap configured to store data associated with RE collisions between one or more LBA's and a command dispatcher configured to release selected LBA ranges that are not associated with a RE collision. The range crawler algorithm is configured to search the data table to detect collisions between the RE's.

Logical block addressing range collision crawler

An input/output device identifies a workload type for a connected host device. The input/output device applies settings for the workload type to affect one or more of a flash translation layer queue depth of the input/output device, a host device data transfer scheduler of the input/output device, and a command status host notification timing by the input/output device to the host device.

Data transfer command latency of a host device

The present disclosure generally relates to a method for intelligent device initiated SAS Phy PM. Using device internal phy characteristics and future phy usage queue, the device determines optimal SAS Phy PM usage based on a predetermined configuration preference of power versus performance. The device achieves optimal SAS Phy PM Usage by implementing a state machine to manage phy PM states and transitions between the PM states. The device state machine includes capabilities to proactively initiate transitions to partial or slumber PM states, start early wake-up from partial or slumber PM states to mask the associated latency impacts of exiting partial or slumber PM states, and selectively reject host requests to enter a partial or slumber PM state.

Growing community of inventors

Rochester, MN, United States of America

Nicholas Edward Ortmeier