Everspin Technologies, Inc.

Freescale Semiconductor,inc.

Motorola Corporation

Northrop Grumman Systems Corporation

Arizona State University

Nicholas David Rizzo

Jon Michael Slaughter

Renu Whig

Jason A Janesky

Phillip G Mather

Bradley Neal Engel

Srinivas V Pietambaram

Jijun Sun

Sanjeev Aggarwal

Frederick B Mancoff

Dimitri Houssameddine

Kenneth H Smith

Bengt J Akerman

Gregory W Grynkewich

Brian R Butcher

Kelly Wayne Kyler

Renu Whig Dave

Mark F Deherrera

Mark A Durlam

Jaynal Abedin Molla

Thomas Andre

Saied N Tehrani

John J D'Urso

Kerry Joseph Nagel

Joseph J Nahas

Mark DeHerrera

Bradley J Garni

Thomas F Ambrose

Jeffrey H Baker

Moazzem Hossain

Michael Manuel Fitelson

Earl D Fuchs

J Jack Ren

Leonid Savtchenko

Herbert Goronkin

Chitra K Subramanian

Sarin A Deshpande

Chaitanya Mudivarthi

Eric John Salter

Gloria J Kerszykowski

Loren J Wise

Anthony Ciancio

Philip Mather

Anatoli A Korkin, Legal Representative

Richard Arthur Kiehl

Michael J Roll

Clarance J Tracy

Bradlfy N Engel

John Slaughter

Three bridge circuits (), each include magnetoresistive sensors coupled as a Wheatstone bridge () to sense a magnetic field () in three orthogonal directions () that are set with a single pinning material deposition and bulk wafer setting procedure. One of the three bridge circuits () includes a first magnetoresistive sensor () comprising a first sensing element () disposed on a pinned layer (), the first sensing element () having first and second edges and first and second sides, and a first flux guide () disposed non-parallel to the first side of the substrate and having an end that is proximate to the first edge and on the first side of the first sensing element (). An optional second flux guide () may be disposed non-parallel to the first side of the substrate and having an end that is proximate to the second edge and the second side of the first sensing element ().

Three axis magnetic field sensor

A magnetoresistive element (e.g., a spin-torque magnetoresistive memory element) includes a fixed magnetic layer, a free magnetic layer, having a high-iron alloy interface region located along a surface of the free magnetic layer, wherein the high-iron alloy interface region has at least 50% iron by atomic composition, and a first dielectric, disposed between the fixed magnetic layer and the free magnetic layer. The magnetoresistive element further includes a second dielectric, having a first surface that is in contact with the surface of the free magnetic layer, and an electrode, disposed between the second dielectric and a conductor. The electrode includes: (i) a non-ferromagnetic portion having a surface that is in contact with a second surface of the second dielectric, and (ii) a second portion having at least one ferromagnetic material disposed between the non-ferromagnetic portion of the electrode and the conductor.

Magnetoresistive stack and method of fabricating same

A magnetoresistive magnetic tunnel junction (MTJ) stack includes a free magnetic region, a fixed magnetic region, and a dielectric layer positioned between the free magnetic region and the fixed magnetic region. In one aspect, the fixed magnetic region consists essentially of an unpinned, fixed synthetic anti-ferromagnetic (SAF) structure which comprises (i) a first layer of one or more ferromagnetic materials, including cobalt, (ii) a multi-layer region including a plurality of layers of ferromagnetic materials, wherein the plurality of layers of ferromagnetic materials include a layer of one or more ferromagnetic materials including cobalt, and (iii) an anti-ferromagnetic coupling layer disposed between the first layer and the multi-layer region. The free magnetic region may include a circular shape, the one or more ferromagnetic materials of the first layer may include cobalt, iron and boron, and the dielectric layer may be disposed on the first layer.

Magnetoresistive stacks with an unpinned, fixed synthetic anti-ferromagnetic structure and methods of manufacturing thereof

A semiconductor process integrates three bridge circuits, each include magnetoresistive sensors coupled as a Wheatstone bridge on a single chip to sense a magnetic field in three orthogonal directions. The process includes various deposition and etch steps forming the magnetoresistive sensors and a plurality of flux guides on one of the three bridge circuits for transferring a 'Z' axis magnetic field onto sensors orientated in the XY plane.

Methods of manufacturing a magnetic field sensor

A memory device includes a memory stack formed on a substrate to program skyrmions within at least one layer of the stack. The skyrmions represent logic states of the memory device. The memory stack further includes a top and bottom electrode to receive electrical current from an external source and to provide the electrical current to the memory stack. A free layer stores a logic state of the skyrmions in response to the electrical current. A Dzyaloshinskii-Moriya (DM) Interaction (DMI) layer in contact with the free layer induces skyrmions in the free layer. A tunnel barrier is interactive with the DMI layer to facilitate detection of the logic state of the skyrmions in response to a read current. At least one fixed magnetic (FM) layer is positioned within the memory stack to facilitate programming of the skyrmions within the free layer in response to the electrical current.

Skyrmion stack memory device

An array of magnetic nanoparticle (MNP) spin torque oscillators (STOs) is described. Each STO is comprised of a uniform, chemically synthesized, spherical nanoparticle which couples to current flowing along a surface. The particles are organized into an array by a self-assembly technique with uniform spacing and close proximity to allow strong electrical and magnetic coupling between particles. The coupling of the nanoparticles to the surface current drives the oscillations by spin-torque, and for phase locking and data input. The uniform, spherical shape of the particles allows the oscillations to be achieved at low currents and with low power dissipation. The MNP-STOs may be used as a basis for massively parallel computing, microwave oscillators, or other applications.

Phase-locked spin torque oscillator array

Growing community of inventors

Gilbert, AZ, United States of America

Nicholas David Rizzo