Discovision Associates

Strategy & Technology Limited

Nicholas Birch

Adrian Philip Wise

Anthony Mark Jones

William P Robbins

Helen Rosemary Finch

David Andrew Barnes

Colin Smith

Martin William Sotheran

Anthony Peter Claydon

Mark Barnes

Andrew Peter Kuligowski

Donald William Patterson

Kevin D Dewar

Anthony Peter J Claydon

Kevin Douglas Dewar

Donald W Walker Patterson

A receiver is described for a testing device for a data stream in which the data stream comprises a plurality of encoded data components. The receiver comprises an input for inputting a plurality of encoded data components, a processor for processing the plurality of encoded data components; and a plurality of outputs each for outputting a processed one of the plurality of encoded data components. The receiver is arranged, such that, in use, a plurality of encoded data components received at the input are processed by the processor and a processed one of the plurality of encoded data components is output from one of the plurality of outputs.

Receiver and a transmitter

A memory interface for connecting a bus to memory comprises an input, a buffer, an address input, a generator, and a writer. The input receives a plurality of data words from the bus. The buffer buffers the data words received from the bus. The address input receives from the bus addresses associated with the plurality of data words. The generator generates a series of addresses in the memory into which the buffered data words may be written. The series of addresses are derived from the received addresses. The writer writes the buffered data words into the memory at the generated addresses.

Memory interface for reading/writing data from/to a memory

An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and data in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in selected stages and are responsive to a recognized control token for reconfiguring such stage to handle an identified DATA Token. A wide variety of unique supporting subsystem circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.

Video decompression

An MPEG video decompression method and apparatus utilizing a plurality of stages interconnected by a two-wire interface arranged as a pipeline processing machine. Control tokens and DATA Tokens pass over the single two-wire interface for carrying both control and in token format. A token decode circuit is positioned in certain of the stages for recognizing certain of the tokens as control tokens pertinent to that stage and for passing unrecognized control tokens along the pipeline. Reconfiguration processing circuits are positioned in select stages and are responsive to a recognized control token for reconfiguring such stages to handle an identified DATA Token. A wide variety of unique supporting subsystems circuitry and processing techniques are disclosed for implementing the system, including memory addressing, transforming data using a common processing block, time synchronization, asynchronous swing buffering, storing of video information, a parallel Huffman decoder, and the like.

Method for storing video information

Token-based adaptive video processing arrangement

A RAM implementation of asynchronous swing buffering is provided in which two buffers are operated asynchronously; one is written while the other is read. Accordingly, this allows for a data stream having a fast rate of through-put to be resynchronized to another rate, while still maintaining a desired rate. In the invention, the write control and read control both have state indicators for communicating which buffer they are using and whether the controls are waiting for access or are, in fact, accessing that buffer.

Technique for implementing a swing buffer in a memory array

Arrangement for processing packetized data

Growing community of inventors

Bristol, United Kingdom

Nicholas Birch