Globalfoundries U.S. Inc.

Globalfoundries Inc.

International Business Machines Corporation

Suss Microtec Photonic Systems Inc.

Marvell Government Solutions, Llc.

Nicholas A Polomoff

Yusheng Bian

Jae Kyu Cho

Eric D Hunt-Schroeder

Mohamed Rabie

Vincent James McGahay

Andreas Daniel Stricker

Frank G Kuechenmeister

Brian Michael Erwin

Thomas F Houghton

Dewei Xu

John J Ellis-Monaghan

Vibhor Jain

Roderick Alan Augur

Jeannine Madelyn Trewhella

Michal Rakowski

Mark William Kuemerle

Christopher Lee Tessler

Koushik Ramachandran

Jennifer D Schuler

Matthew E Souter

Anupam I Arora

Yuri M Brovman

Pallabi Das

Kevin M Boyd

Mukta G Farooq

Steven M Shank

Qizhi Liu

Ping-Chuan Wang

Wolfgang Sauter

Jae-Woong Nah

Kevin Shawn Petrarca

Igor Arsovski

Erdem Kaltalioglu

David Brian Stone

Katsuyuki Sakuma

Eric D Perfecto

Bartlomiej Jan Pawlak

Robert Fox

Cathryn Jeanne Christiansen

Ronald Gene Filippi, Jr

Zhuojie Wu

Richard Francis Taylor, Iii

Dirk Breuer

Keith Donegan

Eric W Tremble

Shaoning Yao

Robert J Fox, Iii

Saquib B Halim

Seungman Choi

Bernhard J Wunder

Eric S Parent

Yunyao Jiang

Ian Melville

Victoria L Calero Diaz Del Castillo

Jawahar P Nayak

Danielle Degraw

Michael Hecker

The present disclosure relates to semiconductor structures and, more particularly, to a photonic chip security structure and methods of manufacture. The structure includes an optical component over a substrate material, and at least one vertical wall including a reflecting material within a dielectric stack of material and surrounding the optical component.

Bragg reflector for photonic chip security structure

A photonic integrated circuit (PIC) die are provided. The PIC die includes a set of optical connect grooves including a first groove aligning a core of a first optical fiber positioned with a first optical component in a first layer at a first vertical depth in a plurality of layers of a body of the die, and a second groove aligning a core of a second optical fiber positioned therein with a second optical component in a second, different layer at a second different vertical depth in the plurality of layers. The grooves may also have end faces at different lateral depths from an edge of the body of the PIC die. Any number of the first and second grooves can be used to communicate an optical signal to any number of layers at different vertical and/or lateral depths within the body of the PIC die.

PIC die and package with multiple level and multiple depth connections of fibers to on-chip optical components

Disclosed is a radio frequency integrated circuit (RFIC) chip that includes an integrated circuit (IC) area and a crackstop laterally surrounding the IC area. The crackstop includes a metallic barrier (or, alternatively, concentric metallic barriers) electrically isolated from the IC area. One or more noise suppressors and, particularly, one or more passive filters (e.g., low pass filter(s), high pass filter(s), band pass filter(s), and/or band stop filter(s)) are integrated into the structure of the metallic barrier(s) to inhibit propagation, through the crackstop, of noise signals within a specific RF range. The specific RF range can be a customer-specified operating parameter. By embedding customized noise suppressor(s) into the crackstop, local signal interference unique to the customer-specified operating parameters can be minimized while also avoiding or at least minimizing the risk of moisture ingress to the IC area. Also disclosed is a method of forming the chip.

Crackstop with embedded passive radio frequency noise suppressor and method

Structures for a cavity included in a photonics chip and methods of fabricating a structure for a cavity included in a photonics chip. The structure includes a substrate, a back-end-of-line stack having interlayer dielectric layers on the substrate, and a cavity penetrating through the back-end-of-line stack and into the substrate. The cavity includes first sidewalls and second sidewalls, and the second sidewalls have an alternating arrangement with the first sidewalls to define non-right-angle corners.

Photonics chips including cavities with non-right-angle internal corners

The present disclosure relates to semiconductor structures and, more particularly, to a photonic chip security structure and methods of manufacture. The structure includes an optical component and a photonic chip security structure having a vertical wall composed of light absorbing material surrounding the optical component.

Photonic chip security structure

A photonic integrated circuit (PIC) structure includes an active region in at least an active layer over a substrate, the active region including a plurality of transistors therein. A plurality of dielectric interconnect layers are over the active region, and an opening is defined through the plurality of dielectric interconnect layers. The opening extends to at least the active layer. A barrier is within the plurality of dielectric interconnect layers and surrounding the opening. An optical element is positioned in the opening. The barrier prevents stress damage, such as cracks and/or delaminations, from propagating from or to the opening, and maintains the hermetic seal of the PIC structure.

Pic structure having barrier surrounding opening for optical element to prevent stress damage

The disclosed subject matter relates generally to photonic integrated circuit chips, semiconductor assemblies or packagings, and a method of forming the same. More particularly, the present disclosure relates to placement of optical fibers on a photonics chip, and a semiconductor assembly including the photonics chip.

Photonics chips and semiconductor products having angled optical fibers

Embodiments of the disclosure provide a photonic integrated circuit (PIC) structure with a passage for a waveguide through a barrier structure. The PIC structure includes a barrier structure on a substrate, having a first sidewall and a second sidewall opposite the first sidewall. A passage is within the barrier structure, and extends from a first end at the first sidewall of the barrier structure to a second end at the second sidewall of the barrier structure. A shape of the passage includes a reversal segment between the first end and the second end. A waveguide within the passage and extends from the first end to the second end of the barrier structure.

Barrier structure with passage for waveguide in photonic integrated circuit

Structures including an edge coupler, and methods of fabricating a structure that includes an edge coupler. The structure includes an edge coupler having a waveguide core with an end surface and a longitudinal axis. The end surface defines a plane tilted in a first direction at a first acute angle relative to the longitudinal axis and tilted in a second direction at a second acute angle relative to the longitudinal axis. The second direction differs from the first direction.

Spot-size converters with angled facets

Embodiments of the disclosure provide a crack detecting and monitoring system, including: a plurality of electrically conductive structures extending about a protective barrier formed in an inactive region of an integrated circuit (IC), wherein an active region of the IC is enclosed within the protective barrier; and a plurality of stages of sensing circuits connected in series for sensing a change in an electrical characteristic of each of the plurality of structures and for receiving an enable signal, wherein each sensing circuit is coupled to a respective structure of the plurality of structures, the change in the electrical characteristic indicating damage to the respective structure, wherein each sensing circuit includes a circuit for selectively generating the enable signal for a next sensing circuit in the plurality of stages of sensing circuits.

Cascaded sensing circuits for detecting and monitoring cracks in an integrated circuit

PIC die packages may include a PIC die including: a body having a plurality of layers including a plurality of interconnect layers. A first optical fiber is positioned in a groove and a second optical fiber positioned in another groove in the edge of the body. The first optical fiber is aligned with an optical component in a first layer of the body at a first vertical depth, and the second optical fiber is aligned with another optical component in a second, different layer of the body at a second different vertical depth. A cover is over at least a portion of the body. The cover includes a member having a face defining a first seat therein having a first height to receive a portion of the first optical fiber, and defining a second seat therein having a second, different height to receive a portion of the second optical fiber.

PIC die and package with cover for multiple level and multiple depth connections of fibers to on-chip optical components

Structures for an optical fiber groove and methods of forming a structure for an optical fiber groove. A photonics chip includes a substrate and an interconnect structure over the substrate. The photonics chip has a first exterior corner, a second exterior corner, and a side edge extending from the first exterior corner to the second exterior corner. The substrate includes a groove positioned along the side edge between the first exterior corner and the second exterior corner. The groove is arranged to intersect the side edge at a groove corner, and the interconnect structure includes metal structures adjacent to the first groove corner. The metal structures extend diagonally in the interconnect structure relative to the side edge of the photonics chip.

Corner structures for an optical fiber groove and manufacturing methods thereof

Structures including an edge coupler and a crackstop, as well as methods of forming a structure including an edge coupler and a crackstop. A waveguide core and a crackstop are located over a top surface of a dielectric layer. A communication passageway is either optically coupled or electrically coupled to the waveguide core. The communication passageway, which may include an electric conductor or a buried waveguide core, extends laterally beneath the crackstop.

Photonics chips with an edge coupler and a continuous crackstop

Corner structures for an optical fiber groove

Growing community of inventors

Irvine, CA, United States of America

Nicholas A Polomoff