Ati Technologies Inc.

Ngar Sze Chan

Grigori Temkine

Oleg Drapkin

Chak Cheung Ho

Ho Ming Wan

A spurious-free fractional-N frequency synthesizer circuit is disclosed. The synthesizer circuit includes a multi-phase network circuit operative to provide output signals that are at least a 1/(2n&plus;1)) fractional version of the input signal. The synthesizer circuit includes a phase lock loop (PLL) circuit, with the multi-phase network circuit being coupled to the negative feedback loop of the PLL. The multi-phase network circuit includes a smoothing circuit that removes any jitter present at the output of the PLL.

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Richmond Hill, Canada

Ngar Sze Chan