Lam Research Corporation

Applied Materials, Inc.

Neungho Shin

Yunsang Kim

Yan Ye

Xiaoye Zhao

Joey Chiu

Fang Tian

Li-Qun Xia

Ellie Y Yieh

Andrew D Bailey, Iii

Gerardo Delgadino

Tzu-Fang Huang

Eller Y Juco

Wen H Zhu

Andreas Fischer

Lihua Li

Heeyeop Chae

Patrick Chung

Lihua Li Huang

Fransisco Camargo

Methods for controlling bevel etch rate of a substrate during plasma processing within a processing chamber includes securing the substrate on a lower electrode within the processing chamber. A power source is provided. A gas mixture is flowed into the processing chamber. A first match arrangement coupled to an upper electrode is adjusted to control current flowing through the upper electrode to change the upper electrode from a grounded state to a floating state. A second match arrangement coupled to a top ring electrode is adjusted to control current flowing through the top ring electrode so as to control plasma formed above a top edge of the substrate. An extension of the upper electrode is lowered during plasma processing so as to minimize a gap between the extension of the upper electrode and the substrate received on the lower electrode, such that the gap is incapable of supporting plasma formed in the processing chamber.

Arrangements for manipulating plasma confinement within a plasma processing system and methods thereof

An arrangement for controlling bevel etch rate during plasma processing within a processing chamber. The arrangement includes a power source and a gas distribution system. The arrangement also includes a lower electrode, which is configured at least for supporting a substrate. The arrangement further includes a top ring electrode positioned above the substrate and a bottom ring electrode positioned below the substrate. The arrangement yet also includes a first match arrangement coupled to the top ring electrode and configured at least for controlling current flowing through the top ring electrode to control amount of plasma available for etching at least a part of the substrate top edge. The arrangement yet further includes a second match arrangement configured to control the current flowing through the bottom ring electrode to control amount of plasma available for at least etching at least a part of the substrate bottom edge.

A method of film deposition using localized plasma to protect bevel edge of a wafer in a plasma chamber. The method includes adjusting an electrode gap between a movable electrode and a stationary electrode, the wafer being disposed on one of the movable electrode and the stationary electrode, to a gap distance configured to prevent plasma formation over a center portion of the wafer, the gap distance also dimensioned such that a plasma-sustainable condition around the bevel edge of the wafer is formed after the adjusting. The method also includes flowing deposition gas into the plasma chamber. The method includes maintaining, using a heater, a chuck temperature that is configured to facilitate film deposition on the bevel edge. The method further includes generating the localized plasma from the deposition gas for depositing a film on the bevel edge.

Methods for depositing bevel protective film

A method, performed in connection with bevel etching of a substrate, for improving bevel-etch repeatability among substrates, is disclosed. The method includes providing an optical arrangement and ascertaining at least one bevel edge characteristic of a bevel edge of said substrate. The method also includes deriving at least one compensation factor from said at least one bevel edge characteristic, said at least one compensation factor pertaining to an adjustment in a bevel etch process parameter. The method further includes performing said bevel etching utilizing said at least one compensation factor.

Arrangements and methods for improving bevel etch repeatability among substrates

A method of fabricating an interconnect structure comprising etching a via into an upper low K dielectric layer and into a hardened portion of a lower low K dielectric layer. The via is defined by a pattern formed in a photoresist layer. The photoresist layer is then stripped, and a trench that circumscribes the via as defined by a hard mask is etched into the upper low K dielectric layer and, simultaneously, the via that was etched into the hardened portion of the lower low K dielectric layer is further etched into the lower low K dielectric layer. The result is a low K dielectric dual damascene structure.

Method of forming a low-K dual damascene interconnect structure

The present invention includes a process for selectively etching a low-k dielectric material formed on a substrate using a plasma of a gas mixture in a plasma etch chamber. The gas mixture comprises a fluorine-rich fluorocarbon or hydrofluorocarbon gas, a nitrogen-containing gas, and one or more additive gases, such as a hydrogen-rich hydrofluorocarbon gas, an inert gas and/or a carbon-oxygen gas. The process provides a low-k dielectric to a photoresist mask etching selectivity ratio greater than about 5:1, a low-k dielectric to a barrier/liner layer etching selectivity ratio greater about 10:1, and a low-k dielectric etch rate higher than about 4000 &#x212b;/min.

Selective etching of carbon-doped low-k dielectrics

Growing community of inventors

San Ramon, CA, United States of America

Neungho Shin