Katholieke Universiteit Leuven

Ecole Polytechnique Federale De Lausanne

Universitá Degli Studi Di Padova

Universita Della Svizzera Italiana

Nele Mentens

Edoardo Charbon

Mauro Conti

Francesco Regazzoni

Md Masoom Rabbani

Jo Vliegen

A configurable hardware device comprises a configuration memory of a known total size, and a configurable fabric arranged for being configured according to information from the configuration memory and segmented in a static partition and at least one dynamic partition. A static partition is arranged for receiving a bit stream and a cryptographic nonce and comprises a read/write mechanism for interacting with the configuration memory. The received bit stream is stored in the configuration memory and used to configure an intended application in the dynamic partition. The static partition is arranged for computing, based on the cryptographic nonce, a checksum of the entire configuration memory and for outputting the checksum.

Configurable hardware device

A reconfigurable logic circuit comprises first, second and third switching circuits arranged for receiving first, second and third input bits, respectively, and each arranged for being configured in a mode wherein the corresponding input bit is passed on or in a mode; a first exclusive OR logic block operable on the outputs of the first, second and third switching circuits and arranged to output a sum bit; fourth, fifth and sixth switching circuits arranged for receiving a fourth, fifth and sixth input bits and arranged for being configured in a mode; first, second and third AND logic blocks, each arranged for receiving a different pair of the outputs of certain switching circuits; a second exclusive OR logic block operable on the outputs of certain AND logic blocks and arranged to produce a carry output bit.

Reconfigurable logic circuit

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Nele Mentens