International Business Machines Corporation

Neil R Vanderschaaf

David James Hathaway

James Douglas Warnock

Jose Angel Paredes

Timothy Michael Skergan

Jeffrey Paul Soreff

Aubrey Deene Ogden

Philip George Shephard, Iii

A method, computer program product and system for testing stuck-at-faults. A first register may be loaded with a first value where the first value may be written into each entry in a memory array. A second register may be loaded with a second value. A third register may be loaded with either the second value or a third value. The second and third values are pre-selected to test selector circuits for stuck-at-faults with a pattern where the pattern includes a set of bits to be inputted to selector circuits and a set of bits to be stored in the memory cells. A value stored in the n-most significant bits in both the second and third registers may be predecoded to produce a predecode value. The predecode value may be compared with the value stored in the n-most significant bits in an entry in the memory array to determine a stuck-at-fault.

Test method for guaranteeing full stuck-at-fault coverage of a memory array

A method for analyzing a gated clock design in which a disabling clock gating transition prevents an output transition from occurring, assuring that no clock glitching occurs. Delays and slews are computed so that the arrival time computation that includes clock and gate signal delays are computed at the output, providing tests which ensure that no glitch situation occurs. The delays and slews are computed using a static timing analysis, which includes situations such as a late and early arriving gate clock signals. The invention may be used in any static timing analysis test to ensure that a first transition on one input of a circuit prevents the propagation of a second transition on another input of the circuit.

Reduced pessimism clock gating tests for a timing analysis tool

A method and system for automatically maintaining data consistency across two or more hierarchically arranged databases is disclosed. A master list and an environmental variable file are created for use in maintaining the data consistency of a cell view. A cell view in a selected database is then checked to see if it has been modified by performing date-time stamp shadowing. If the cell view is modified, the cell view is then retrieved by derivative lists created from the master list and the environmental variable file and translated based on criteria from the environmental variable file. Verification is then performed on the translated cell view once again based on criteria from the environmental variable file. This verification creates a signature for the translated cell view. Signatures are then checked for being out of date with respect to any dependency listing contained internally. Any signature found to be out of date triggers an automatic re-verification of the pertinent data file. The translated and verified cell view is then checked to see if it or any of its dependencies have been altered by performing an audit based on criteria from the environmental variable file using the signature. The translated and verified cell view is then promoted to a higher quality database based on the results of the audit.

Method and system for automatically maintaining data consistency across various databases

A method and circuitry are provided for latching information. The information is selectively transferred from a selected one of: a first node (DIN) to a second node (416); and a third node (SIN) to a fourth node (419a-b). The transferred information is selectively latched by coupling the second node (416) to the fourth node (419a-b) in response to a signal (308, 410).

Circuitry and method for latching information

A processing system and method of operation are provided. At least one execution unit processes information of a register in response to an instruction specifying the register. Each of multiple control units selectively allocates a respective one of multiple buffers to store the information in response to the instruction.

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Round Rock, TX, United States of America

Neil R Vanderschaaf