Control Data Corporation

Other

Neil R Lincoln

David R Resnick

Brian Keith Smith

Dennis A Moon

John R Makosky

Brian Lincoln

Rolf D Miller

Eric Christeson

Elizabeth Wiethoff

Ningsheng Huang

Rex Filstrup

Michael T C Johnson

A system for presenting meteorological information uses a browser interface to access massive amounts of weather-related data in the form of images stored on the server-side of the system. A user having a common browser on a Web client accesses the server-side information to selectively assemble weather-related data on multiple overlays of images and/or graphics into one simultaneous presentation on a Web page. The different overlays are normalized with respect to time and space, and a user can separately generate graphically miniaturized presentations of weather-related data for saving and subsequently recalling each presentation, wherein each presentation is displayed with current relativized data. The user can also select or customize derived variables to be distinctively displayed as part of a presentation.

System presenting meteorological information using a browser interface

A microcode program sequencer includes first and second registers (herein designated the Q and P registers), each connected to a computer memory to receive addresses therefrom. Control means is provided for each register such that the P register will provide output addresses to a microcode memory, whereas the Q register(s) provide output addresses to the P register. By properly operating the control means, incrementing of addresses from the P register can be accomplished, as well as address jumps and returns, using the Q register. Further, the contents of the Q register may also be incremented in synchronism with the P register, as desired. One feature of the invention resides in a conditional latch circuit which may be selectively operated as a latch or as an OR gate.

Microcode program sequencer

A conditional latch circuit is selectively operable as a latch or as an OR gate. The circuit comprises an OR gate having at least three inputs, each connected to the output of separate ones of three AND gates. A fourth AND gate has an inverted output connected to an input of two AND gates and a non-inverted output connected to an input of the third AND gate. The output of the OR gate is connected to a second input of the third AND gate. With one input of the fourth AND gate connected to a binary clock source, the circuit will operate as a latch to store binary signals received at the second input of the first and second AND gates when the second input of the fourth AND gate is connected to binary one. When the second input of the fourth AND gate is connected to a binary zero, the circuit will operate as an OR circuit.

Conditional latch circuit

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Saint Paul, MN, United States of America

Neil R Lincoln