Sunpower Corporation

Neil Kaminar

Richard M Swanson

Douglas H Rose

David D Smith

Denis De Ceuster

Vikas Desai

Thomas Pass

Michael Cudzinovic

William P Mulligan

Keith R McIntosh

David R Smith

Shandor G Daroczi

Thomas Phu

Pongsthorn Uralwong

Luca Pavani

In one embodiment, harmful solar cell polarization is prevented or minimized by providing a conductive path that bleeds charge from a front side of a solar cell to the bulk of a wafer. The conductive path may include patterned holes in a dielectric passivation layer, a conductive anti-reflective coating, or layers of conductive material formed on the top or bottom surface of an anti-reflective coating, for example. Harmful solar cell polarization may also be prevented by biasing a region of a solar cell module on the front side of the solar cell.

Preventing harmful polarization of solar cells

Solar cell interconnects with multiple current paths. A solar cell interconnect may include a plurality of in-plane slits arranged in several rows. The in-plane slits may be spaced to provide strain relief without unduly increasing the electrical path resistance through the solar cell interconnect. The in-plane slits may be staggered, for example.

Solar cell interconnect with multiple current paths

A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer through use of masking and etching techniques. Metal contacts are made to the p-regions  and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed. A front surface of the wafer is preferably textured by etching or mechanical abrasion with an IR reflection layer provided over the textured surface. A field layer can be provided in the textured surface with the combined effect being a very low surface recombination velocity.

Method of manufacturing solar cell

A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer through use of masking and etching techniques. Metal contacts are made to the p-regions and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed. A front surface of the wafer is preferably textured by etching or mechanical abrasion with an IR reflection layer provided over the textured surface. A field layer can be provided in the textured surface with the combined effect being a very low surface recombination velocity.

Solar cell and method of manufacture

A solar cell that is readily manufactured using processing techniques which are less expensive than microelectronic circuit processing. In preferred embodiments, printing techniques are utilized in selectively forming masks for use in etching of silicon oxide and diffusing dopants and in forming metal contacts to diffused regions. In a preferred embodiment, p-doped regions and n-doped regions are alternately formed in a surface of the wafer in offset levels through use of masking and etching techniques. Metal contacts are made to the p-regions and n-regions by first forming a seed layer stack that comprises a first layer such as aluminum that contacts silicon and functions as an infrared reflector, second layer such titanium tungsten that acts as diffusion barrier, and a third layer functions as a plating base. A thick conductive layer such as copper is then plated over the seed layer, and the seed layer between plated lines is removed. A front surface of the wafer is preferably textured by etching or mechanical abrasion with an antireflection layer provided over the textured surface. A field layer can be provided in the textured surface with the combined effect being a very low surface recombination velocity.

A carrier for use in processing of a plurality of wafers or other substrates includes a support frame on which the wafers are mounted and in one embodiment at least one auxiliary frame for holding the substrates on the support frame. A plurality of clips extend from the auxiliary frame and engage the substrates in pressure engagement, and fasteners retain the auxiliary frame in position with respect to the support frame. In one embodiment two auxiliary frames can be employed for holding wafers on opposing surfaces of the support frame. The support frame has electrically non-conducting surfaces whereby the processing does not affect the support frame, and the auxiliary frame is made of electrically non-conductive material. The clips are electrically conductive and bridge current from the support frame to the wafers during plating operations. In another embodiment, auxiliary frame are not used and the wafer retention clips are mounted on the support frame. In use, the carrier can support a high number of units for processing with no significant mechanical stress being transferred to the wafers during loading and unloading from the carrier. The carriers and wafers can be transferred easily for different chemical baths and can be handled safely during rinsing and drying steps.

Substrate carrier for electroplating solar cells

Screen printing to an edge of an object without the flow of print ilk over the edge and to a supporting platen is realized by applying a flow of gas from the platen over the edge of the object and opposing the flow of print ink. The platen can have a support surface including a groove or a plurality of holes arranged to match the edge of the wafer. The wafer can include a semiconductor wafer such as a photovoltaic cell, and the gas can include air, nitrogen, or an inert gas.

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Santa Cruz, CA, United States of America

Neil Kaminar