Intel Corporation

Neha M Patel

Nachiket R Raravikar

Sujit Sharan

Dae-Woo Kim

Ajay Jain

Rodrick J Hendricks

Mihir A Oka

Ken P Hackenberg

Vladimir Noveski

Mohammad M Farahani

Vijay Krishnan (Vijay) Subramanian

An integrated circuit package is disclosed. The integrated circuit package comprises a first integrated circuit die and a second integrated circuit die. The integrated circuit package further includes a substrate, wherein both the first integrated circuit die and the second integrated circuit die are connected to the substrate. The substrate includes an interconnect bridge embedded within the substrate, wherein the interconnect bridge includes at least one metal trace component, wherein the metal trace component includes rounded corners on a bottom portion of the metal trace component.

Rounded metal trace corner for stress reduction

Foundation layers and methods of forming a foundation layer are described. Die pads are formed over a die. A dielectric layer is formed over die pads and the die. The dielectric layer is then recessed to expose top portions of the die pads. A first plurality of sintered conductive vias are formed over the die pads. The first sintered conductive vias are coupled to at least one of the die pads. In addition, a photoresist layer may be formed over the dielectric layer and the top portions of the die pads. Via openings are formed in the photoresist layer. A second plurality of sintered conductive vias may then be formed over the first sintered conductive vias to form a plurality of sintered conductive lines. Each of the first and second sintered conductive vias are formed with a liquid phase sintering (LPS) solder paste.

Sintered solder for fine pitch first-level interconnect (FLI) applications

Temperatures in microelectronic integrated circuit packages and components may be measured in situ using carbon nanotube networks. An array of carbon nanotubes strung between upstanding structures may be used to measure local temperature. Because of the carbon nanotubes, a highly accurate temperature measurement may be achieved. In some cases, the carbon nanotubes and the upstanding structures may be secured to a substrate that is subsequently attached to a microelectronic package.

Integrated microelectronic package temperature sensor

A stress sensor is disclosed herein. The stress sensor includes a plurality of carbon nanotubes in a substrate, and first and second contacts electrically connectable with the plurality of carbon nanotubes. Methods of making and using the stress sensor are also disclosed.

Stress sensor for in-situ measurement of package-induced stress in semiconductor devices

An embodiment of the present invention is a technique to form stress sensors on a package in situ. A first array of carbon nanotubes (CNTs) aligned in a first orientation is deposited at a first location on a substrate or a die in a wafer. The first array is intercalated with polymer. The first polymer-intercalated array is covered with a protective layer. A second array of CNTs aligned in a second orientation is deposited at a second location on the substrate or the die. The second array is intercalated with polymer.

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Chandler, AZ, United States of America

Neha M Patel