Genesis Microchip Corporation

Qualcomm Incorporated

Neha Agrawal

Arun Johary

Hari N Nair

Saif Choudhary

Ashish Neema

Shashi Kumar

Chulkyu Lee

Sajin Mohamad

Harsha Kamath

An apparatus, including: a clock source configured to generate first and second clock signals based on an input clock signal, wherein each of the first and second clock signals has a frequency being substantially a frequency of the input clock signal divided by 2N+1, where N is an integer; and a logic circuit configured to perform a logic operation on the first and second clock signals to generate an output clock signal with a frequency being substantially the frequency of the input clock signal divided by NP5, where P5 is a half fraction.

NP5 fractional clock divider

Systems and methods for dividing input clock signals by programmable divide ratios can produce output clock signals with the delay from the input clock signal to the output clock signal independent of the value of the divide ratio and with the duty cycle of the output clock signal being 50% independent of the value of the divide ratio. An example programmable clock divider includes a modulo N counter that produces a count signal that counts modulo the divide ratio and a half-rate clock signal generator that produces a common half-rate clock signal, an even half-rate clock signal, and an odd half-rate clock signal that toggle at one-half the rate of the output clock signal. The common half-rate clock signal, the even half-rate clock signal, and the odd half-rate clock signal are combined to produce the output clock signal.

High-speed programmable clock divider

An apparatus and method for allowing color adjustments in display devices is disclosed The apparatus comprises a multi-resolution structure for providing color adjustments; and an interpolator for interpolating at least one offset of the multi-resolution structure. An apparatus and method in accordance with the present invention uses a combination of color look-up tables with different levels of resolution, followed by interpolation to provide a display process which has high resolution but utilizes minimal memory. In so doing, memory is used for high-resolution areas only where needed. The multi-resolution structure is a very good approximation to the theoretical mapping table in the areas where it is needed. At the same time, since the high resolution areas are localized, a significant reduction in memory storage is possible.

Apparatus and method for multi-resolution color mapping for display devices

A method and apparatus that allows a display device to adaptively and automatically control display contrast and color is disclosed. The method and system in accordance with the present invention can be described by the following sequential process:

Method and system for adaptive color and contrast for display devices

Automatically and adaptively controlling contrast and color of a display device by computing a normalized histogram of a current image, computing degrees of correlation between the normalized histogram and a number of template histograms, sorting the template histograms based upon the associated degrees of correlation, selecting a number of the best correlated template histograms based on the sorting, blending the selected the transfer functions associated with the selected template histograms to form a blended transfer function, and applying the blended transfer function to the current image.

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Bengaluru, India

Neha Agrawal