University of Florida Research Foundation Inc

Navid Asadi-Zanjani

Mark M Tehranipoor

Nathan Jessurun

Damon Woodard

Ronald Wilson

Olivia Pauline Paradis

Domenic J Forte

Shahin Tajik

Nidish Vashistha

Mukhil Azhagan Mallaiyan Sathiaseelan

Mir Tanjidur Rahman

Nitin Varshney

Jacob C Harrison

Chengjie Xi

John True

Hangwei Lu

Various embodiments provide computer vision techniques for ensuring system- and component-level integrity via component characterization. Various embodiments may comprise computer vision systems that are configured to extract pin information from surface-mount device ('SMD') contours. Accordingly, the disclosed embodiments may include a computer vision system configured to detect the extremities of each pin in a SMD contour image based on a combination of at least one of machine learning and one or more PCB image collection datasets.

System and method for computer inspection of surface-mount devices

Various embodiments of the present disclosure provide systems and methods for classifying and evaluating an electronic object based at least in part on terahertz (THz) data. THz data may comprise time-domain THz data collected via THz time domain spectroscopy of the electronic object. THz data may further comprise frequency-domain THz data, which may be generated based at least in part on the time-domain THz data. A unique THz fingerprint may be generated for the electronic object based at least in part on the THz data. This unique THz fingerprint may be compared to an earlier generated THz fingerprint of the same electronic object to evaluate reliability and consistency. The unique THz fingerprint may also be compared to THz fingerprints or THz data of other electronic objects of the same object type, class, design, and/or the like, to validate the electronic object (e.g., determine if the electronic object is counterfeit).

Terahertz data collection for electronic object classification and evaluation

Methods and systems are directed to protect a target logic circuit against optical probing attacks and conceal a logic state in the target logic circuit. The method comprises designing a concealing logic circuit. The concealing logic circuit can be coupled to complement of input signals of the target logic circuit, inserted as neighbor logic circuit of the target logic circuit, and placed in close optical proximity to the target logic circuit. The concealing logic circuit can operate in the opposite operation mode or logic state of the target logic circuit in response to the complement of the input signals to the target logic circuit. The method can further comprise designing an evaluation circuit that generates the complement of the input signals and minimizes a path delay between the target logic circuit input and the concealing logic circuit input.

Apparatus for protecting against optical probing attacks

Embodiments of the present disclosure provide methods, apparatus, systems, and computer program products for using an image of an integrated circuit (IC) including a plurality of cells to locate one or more target cells within the IC. Accordingly, in various embodiments, a footprint for each cell of the plurality of cells is encoded to transform the image of the IC into a two-dimensional string matrix. A string search algorithm is then applied on each encoded dopant region found in the two-dimensional string matrix using an encoded target layout cell to identify one or more candidate regions of interest within the image. Finally, a mask window is slid over each candidate region of interest while performing matching using match criteria to identify any target cells in the one or more target cells that are located within the candidate region of interest.

Knowledge-based object localization in images for hardware assurance

Various embodiments of the present disclosure provide for accelerated segmentation for reverse engineering of integrated circuits. In one example, an embodiment provides for receiving an SEM image for an integrated circuit, performing filtering and binarization with respect to the SEM image, extracting information associated with filter sizes for the filtering, extracting signatures related to a distribution for background pixels and foreground pixels of the SEM image, extracting respective distance to mean signatures for the background pixels and the foreground pixels, and segmenting the SEM image based at least in part on the filter sizes and the respective distance to mean signatures to generate a segmented image for the integrated circuit.

Accelerated segmentation for reverse engineering of integrated circuits

Embodiments of the present disclosure provide methods, apparatus, systems, computing devices, computing entities for setting deprocessing parameters used in conducting hardware deprocessing on a hardware. In accordance with one embodiment, a method is provided that includes: receiving sample images using different E-beam voltages, wherein each image is captured from a backside of the hardware using a different E-beam voltage; generating thickness-based contour maps, wherein each map is generated for an image and includes contour lines indicating locations having a same thickness of remaining material; generating estimated E-beam penetration depths, wherein each depth is generated for an image and is based at least in part on the E-beam voltage used to capture the image; generating an estimated thickness measurement of the remaining material based at least in part on the contour maps and the penetration depths; and setting the deprocessing parameters based at least in part on the estimated thickness measurement.

Hardware deprocessing using voltage imaging for hardware assurance

There is a need for more effective and efficient printed circuit board (PCB) design. This need can be addressed by, for example, solutions for performing automated PCB component estimation. In one example, a method includes identifying a plurality of initial component estimations for the PCB; performing a shadow detection segmentation using the plurality of initial component estimations, a non-direct-lighting image, and one or more direct-lighting images to generate a first set of detected PCB components; performing a super-pixel segmentation using the plurality of initial component estimations and the non-direct-lighting-image to generate a second set of detected PCB components; and generating a bill of materials for the PCB based at least in part on the first set of detected PCB components and the second set of detected PCB components.

Techniques for printed circuit board component detection

There is a need for more effective and efficient printed circuit board (PCB) design. This need can be addressed by, for example, solutions for performing automated PCB component estimation. In one example, a method includes identifying a PCB image of a PCB; performing chromaticity-based background subtraction on the PCB image to generate a background-subtracted PCB image; performing morphological noise removal on the background-subtracted PCB image to generate a noise-removed PCB image; and performing object localization on the noise-removed PCB image to identify one or more PCB component estimations within the noise-removed PCB image.

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Gainesville, FL, United States of America

Navid Asadi-Zanjani