Hewlett-Packard Development Company, L.p.

Other

Hewlett Packard Enterprise Development LP

The Royal Institution for the Advancement of Learning / Mcgill University

Nathaniel Quitoriano

Theodore I Kamins

David A Fattal

Hans S Cho

Marco Fiorentino

Richard Stanley Williams

Shih-Yuan Wang

Philip John Kuekes

Charles Santori

Zhen Peng

Jianhua Yang

Wei Guang Wu

Duncan R Stewart

Robert Newton Bicknell

Marco Florentino

Raymond G Beausoleil

John Paul Strachan

Sagi Varghese Mathai

Wei E Wu

William M Tong

Julien Borghetti

Douglas Ohlberg

Duncan J Stewart

Alexandre Horth

A light emitting diode device is described which includes at least one planar non-periodic high-index-contrast grating. The light emitting diode device includes a cavity formed between a reflective optical element and a transmissive optical element. One or both of the optical elements can be a planar non-periodic high-index-contrast grating. The transmissive optical element can be a collimating lens used to collimate incident beams of light while the reflective optical element can be a parabolic reflector used to reflect incident beams of light along a direction opposite to an incidence direction. A light emitter can be disposed within the cavity and can emit beams of light.

Light emitting diode device

Photonic integrated circuits required connection to germanium doped silica cored optical fibers or silica cored and fluorine doped silica cladding optical fibers which have low index contrast and large mode field diameters. However, the optical waveguide within a photonic integrated circuit such as formed using silicon-on-insulator or compound semiconductors tends to be high index contrast and small mode field diameter. Accordingly, it is necessary to implement adiabatic waveguide tapers with a high coupling efficiency and small footprint in order to couple into the photonic integrated circuits to/from the optical fiber. Prior art tapers have been generally high loss and absorb valuable die footprint. In contrast the inventors demonstrate a small low loss waveguide taper designed using a methodology they refer to a 'constant loss'.

Methods and systems relating to optical waveguide tapers

A method of growing high quality crystalline films on lattice-mismatched or amorphous layers is presented allowing semiconductor materials that would normally be subject to high stress and cracking to be employed allowing cost reductions and/or performance improvements in devices to be obtained. Catalysis of the growth of these films is based upon utilizing particular combinations of metals, materials, and structures to establish growth of the crystalline film from a predetermined location. The subsequent film growth occurring in one or two dimensions to cover a predetermined area of the amorphous or lattice-mismatched substrate. Accordingly the technique can be used to either cover a large area or provide tiles of crystalline material with or without crystalline film interconnections.

Lateral growth semiconductor method and devices

An optical modulator includes a first layer that is transparent or semitransparent over a range of optical wavelengths; a modulation layer made from nanoparticles embedded in a matrix; a first electrode and a second electrode that create an electrical field that passes through the modulation layer. A method for forming a nanoparticle modulator includes obtaining and preparing a substrate; forming sub-layers on the substrate; forming a nanoparticle modulator layer, where the nanoparticle modulator layer is an electrical insulator and has a thickness of less than the wavelength of light the nanoparticle QCSE modulator is designed to modulate.

Nanoparticle-based quantum confined stark effect modulator

Various embodiments of the present invention are direct to nanoscale, reconfigurable, memristor devices. In one aspect, a memristor device comprises an electrode () and an alloy electrode (). The device also includes an active region () sandwiched between the electrode and the alloy electrode. The alloy electrode forms dopants in a sub-region of the active region adjacent to the alloy electrode. The active region can be operated by selectively positioning the dopants within the active region to control the flow of charge carriers between the electrode and the alloy electrode.

Using alloy electrodes to dope memristors

An energy collection system is provided. The system can include an energy collection device and an energy concentration device disposed proximate at least a portion of the energy collection device. The energy concentration device includes a non-periodic, sub-wavelength, dielectric grating.

Energy collection systems and methods

A ridge waveguide with decreased optical losses from surface scattering includes a ridge waveguide with etched surfaces and an optical layer deposited on the ridge waveguide that substantially covers the etched surfaces. A method of reducing optical energy losses from scattering at etched surfaces of a ridge waveguide includes depositing a layer of optical material over the etched surfaces, the layer of optical material filling surface irregularities in the etched surfaces.

Ridge waveguide

A nanowire device includes a nanowire having differently functionalized segments. Each of the segments is configured to interact with a species to modulate the conductance of a segment. The nanowire is grown from a single catalyst and the segments include a first segment at a non-linear angle from a second segment.

Nanowire sensor with angled segments that are differently functionalized

A memristive routing device includes a memristive matrix, mobile dopants moving with the memristive matrix in response to programming electrical fields and remaining stable within the memristive matrix in the absence of the programming electrical fields; and at least three electrodes surrounding the memristive matrix. A method for tuning electrical circuits with a memristive device includes measuring a circuit characteristic and applying a programming voltage to the memristive device which causes motion of dopants within the memristive device to alter the circuit characteristic. A method for increasing a switching speed of a memristive device includes drawing dopants from two geometrically separated locations into close proximity to form two conductive regions and then switching the memristive device to a conductive state by applying a programming voltage which rapidly merges the two conductive regions to form a conductive pathway between a source electrode and a drain electrode.

Memristive device

A multilayer memristive device includes a first electrode; a second electrode; a first memristive region and a second memristive region which created by directional ion implantation of dopant ions and are interposed between the first electrode and the second electrode; and mobile dopants which move within the first memristive region and the second memristive region in response to an applied electrical field.

Multilayer memristive devices

Various embodiments of the present invention are direct to nanoscale, reconfigurable memristor devices. In one aspect, a memristor device () comprises an active region () sandwiched between a first electrode () and a second electrode (). The active region including a non-volatile dopant region () selectively formed and positioned within the active region.

Controlled placement of dopants in memristor active regions

A photonic device () and method () of making the photonic device () employs preferential etching of grain boundaries of a polycrystalline semiconductor material layer (). The method () includes growing () the polycrystalline layer () on a substrate (). The polycrystalline layer includes a transition region () of variously oriented grains and a region () of columnar grain boundaries () adjacent to the transition region. The method further includes preferentially etching () the columnar grain boundaries to provide tapered structures () of the semiconductor material that are continuous () with respective aligned grains () of the transition region. The tapered structures are predominantly single crystal. The method further includes forming () a conformal semiconductor junction () on the tapered structures and providing () first and second electrodes. The first electrode () is adjacent to the transition region and the second electrode () is adjacent to a surface layer of the conformal semiconductor junction.

Photonic device and method of making the same

An optical interconnect has a plurality of optical sources, a first lens configured to collimate optical beams from the plurality of optical sources, a second lens configured to refocus the optical beams, and a plurality of optical receivers configured to receive the refocused optical beams from the second lens.

Optical interconnect

A method for making a multi-level nanowire structure includes establishing a first plurality of nanowires on a substrate surface, wherein at least some of the nanowires are i) aligned at a predetermined crystallographically defined angle with respect to the substrate surface, ii) aligned substantially perpendicular with respect to the substrate surface, or iii) combinations of i and ii. An insulating layer is established between the nanowires of the first plurality such that one of two opposed ends of at least some of the nanowires positioned i) at the predetermined crystallographically defined angle, ii) substantially perpendicular with respect to the substrate surface, or iii) combinations of i and ii is exposed. Regions are grown from each of the exposed ends, and such regions coalesce to form a substantially continuous layer on the insulating layer. A second plurality of nanowires is established on the substantially continuous layer.

Growing community of inventors

Pacifica, CA, United States of America

Nathaniel Quitoriano