Rockwell Collins, Inc.

Nathaniel P Wyckoff

Brandon C Hamilton

Richard Korneisel

Kyle B Snyder

Jacob R Mauermann

Nathan P Lower

Bret W Simon

Steven John Wiebers

Bruce Rowenhorst

Ross Keith Wilcoxon

Carlen R Welty

Reginald D Bean

Alan P Boone

Jenny Calubayan

Jeremiah Damien Wolf

Mark M Mulbrook

Robert L Palandech

Alexander Warren

Bruce E Rowenhorst

Systems and methods for selectively etching features in an electronic substrate via a precision dispense apparatus and precision etchant dispense tool are disclosed. The method includes creating a toolpath instruction for etching at least one feature in the substrate, programming the precision dispense apparatus to execute the created toolpath instruction, and causing the precision dispense tool to deposit etchant material onto the surface of the substrate to etch the substrate surface to produce the at least one feature according to the created toolpath instruction. The capabilities of the systems and methods disclosed herein extend to 3D substrates and post-build processing, among others.

Maskless etching of electronic substrates via precision dispense process

A system may include an array of interconnected memristors. Each memristor may include a first electrode, a second electrode, and a memristor material positioned between the first electrode and the second electrode. The system may further include a controller communicatively coupled to the array of interconnected memristors. The controller may be configured to tune the array of interconnected memristors.

System and device including memristor material

Systems and methods for custom photolithography masking via a precision dispense apparatus and process are disclosed. Methods include creating a toolpath instruction for depositing opaque onto a substrate, programming a precision dispense apparatus to execute the created toolpath instruction, and causing the precision dispense tool to deposit opaque material onto the substrate to form the photomask. The substrate may be an optically transparent plate or film or may be an electronic substrate where the opaque material is deposited directly onto a photoresist coating. Capabilities of the systems and methods disclosed herein extend to 3D substrates and custom photolithography masking, among others.

Custom photolithography masking via precision dispense process

A shadow mask for a substrate is disclosed. The shadow mask includes a frame circumscribing a surface of the substrate. The shadow mask further includes one or more island mask features within the surface of the substrate, configured to block a deposition of a material onto at least a portion of the surface of the substrate. The shadow mask further includes one or more crossbeams coupling one or more island mask features to the frame at an elevation relative to the substrate. The one or more cross beams are configured to permit deposition of a material onto the substrate surface underneath the one or more crossbeams. In some instances, the shadow mask is manufactured through an additive manufacturing process.

Additively manufactured shadow masks for material deposition control

A system and method. The system may include an integrated circuit (IC) die. The IC die may have two faces and sides. The system may further include mold material. The mold material may surround at least the sides of the IC die. The IC die may be mechanically interlocked with the mold material.

Reconstituted wafer including integrated circuit die mechanically interlocked with mold material

A system and method. The system may include an integrated circuit (IC) die having two faces and sides. The system may further include mold material surrounding at least the sides of the IC die. The system may further include a redistribution layer and signal pads. The redistribution layer may be positioned between (a) the signal pads and (b) the mold material and the IC die. The redistribution layer may have conductive paths at least connecting the IC die and at least some of the signal pads. A surface of the mold material may abut the redistribution layer. The surface of the mold material may include at least one recessed area having at least one conductive feature connected to at least one of the conductive paths or the IC die.

Reconstituted wafer including mold material with recessed conductive feature

A chip-scale gyrometric apparatus is disclosed. In embodiments, the chip-scale gyrometric apparatus includes a dielectric substrate and an antenna element attached thereto for receiving an inbound signal having an initial phase. The apparatus includes a splitter for splitting the inbound signal into two equivalent signals, and two coils connected to the splitter. The first coil carries one of the split signals in a clockwise (CW) path relative to a rotational axis, while the second coil carries the other split signal in a counterclockwise (CCW) path relative to the same axis. An integrated circuit (IC) on the substrate and connected to the first and second coils measures a phase shift between the first and second signals (e.g., deviation from the initial phase) based on their respective CW and CCW paths and determines, based on the measured phase shift, a degree of rotation relative to the common rotational axis.

Chip-scale gyrometric apparatus

A system may include a first conductive plate configured at least to receive an input signal. The system may include a second conductive plate configured at least to output an output signal. The system may further include a memristor material positioned between the first conductive plate and the second conductive plate.

A system may include a multi-lead memristor. The multi-lead memristor may include a first lead, a second lead, a third lead, a first memristor material, and a second memristor material. The second lead may be positioned between the first lead and the third lead. The first memristor material may be positioned between the first lead and the second lead. The second memristor material may be positioned between the second lead and the third lead.

A system may include a first conductive plate configured at least to receive an input signal and a second conductive plate configured at least to output an output signal. The system may further include a first memristor material positioned between the first conductive plate and the second conductive plate. The system may further include a second memristor material positioned between the first conductive plate and the second conductive plate. The first memristor material and the second memristor material may be in parallel electrically. The first memristor material may be different from the second memristor material.

System and device including memristor materials in parallel

A system and method includes pre-warping a mask to induce strain when affixed to a substrate and ensure positive contact between the mask and the substrate during all phases of deposition. A film is applied to the mask at a rate sufficient to impart stress to the film faster than such stress can be released. Depending on the features defined by the mask, the pre-warping may be concentric, linear along one axis, or complex along a plurality of axes.

Controlled warping of shadow mask tooling for improved reliability and miniturization via thin film deposition

An electronic device fabrication system may include, but is not limited to: a conductive material deposition device configured for deposition of a conductive material; at least one electronic device substrate configured to receive deposited conductive material; and at least one mask configured to selectively transmit the conductive material to the electronic device substrate, wherein the at least one mask configured to selectively transmit the conductive material to the electronic device substrate includes: at least a first side disposed at an angle relative to an adjacent second side.

Conformal multi-plane material deposition

An integrated circuit (IC) package incorporating controlled induced warping is disclosed. The IC package includes an electronic substrate having an active side upon which semiconducting dies and functional circuits have been lithographed or otherwise fabricated, leading to an inherent warping in the direction of the active side. One or more corrective layers may be deposited to the opposing, or inactive, side of the semiconducting die via thin film deposition (TFD) instrumentation and techniques in order to induce corrective warping of the electronic substrate back toward the horizontal (e.g., in the direction of the inactive side) to a desired degree.

Controlled induced warping of electronic substrates

An integrated circuit (IC) package incorporating controlled induced warping is disclosed. The IC package includes an electronic substrate having an active side upon which semiconducting dies and functional circuits have been lithographed or otherwise fabricated, leading to an inherent warping in the direction of the active side. One or more corrective layers may be deposited to the opposing, or inactive, side of the semiconducting die via electroplating in order to induce corrective warping of the electronic substrate back toward the horizontal (e.g., in the direction of the inactive side) to a desired degree.

Controlled induced warping of electronic substrates via electroplating

A fault indication method for equipment includes receiving a fault signal indicative of a fault of a device; energizing a light emitter based on the received fault indication, in which a luminous material is made to fluoresce based on receipt of light emitted by the light emitter; detecting fluorescence of the luminous material by a light detector, and outputting a voltage and/or current indicative of the fluorescence; and providing a fault output signal when the voltage and/or current exceeds a predetermined value.

Growing community of inventors

Marion, IA, United States of America

Nathaniel P Wyckoff