Rockwell Collins, Inc.

Nathan P Lower

Ross Keith Wilcoxon

Alan P Boone

Nathaniel P Wyckoff

James R Wooldridge

David W Dlouhy

James B West

David W Cripe

Mark M Mulbrook

Lee M Paulsen

Jeremiah Damien Wolf

Brandon C Hamilton

Joseph M Bohl

Robert L Palandech

David D Hillman

David M Brower

David L Westergren

James D Sampica

Tracy J Barnidge

Paul R Nemeth

James H Doty

Brian J Herting

Matilda Gabriela Livadaru

Don L Landt

Anders P Walker

Jonathan P Doane

Roger A Dana

Bryan S McCoy

Joseph L Tchon

Tyler J Wilson

Peter M Sahayda

Sandra S Dudley

Qizhou Matthew Yao

Pete Sahayda

Anthony J Strzelczyk

Lucas J Lower

John A Chihak

Haley M Steffen

Brian K Otis

Luke R Porisch

A method for fabricating semiconductor die with die-attach preforms is disclosed. In embodiments, the method includes: applying an uncured die-attach paste material to a surface of a forming substrate to form one or more die-attach preforms, the surface of the forming substrate formed from a hydrophobic material; curing the one or more die-attach preforms; performing one or more planarization processes on the one or more die-attach preforms; coupling a first surface of a semiconductor die to a handling tool; and bonding a second surface of the semiconductor die to at least one die-attach preform of the one or more die-attach preforms.

System and method for extreme performance die attach

A vertically integrated circuit assembly may include a substrate including a plurality of electrical traces, and a first circuit assembly layer disposed on the substrate. In embodiments, the first circuit assembly layer includes a first set of integrated circuit components, and a plurality of electrical interconnects configured to route signals through the first circuit assembly layer. In embodiments, the vertically integrated circuit assembly further includes a second circuit assembly layer coupled to the top surface of the first circuit assembly layer. The second circuit assembly layer may include a second set of integrated circuit components, and a plurality of electrical interconnects configured to route signals through the second circuit assembly layer. In embodiments, an electrical interconnect arrangement on a top surface of the first circuit assembly layer is configured to interface with an electrical interconnect arrangement on the bottom surface of the second circuit assembly layer.

Vertically integrated circuit assembly

An antenna array system can include a plurality of sheet metal structures arranged substantially parallel to one another. Each sheet metal structure can include a row of antenna elements and the plurality of sheet metal structures can form an array of antenna elements. The antenna array system can include a plurality of printed circuit boards (PCBs) each of which is mechanically and electrically coupled to a respective sheet metal structure. Each sheet metal structure extends beyond the PCB to which it is mechanically coupled. The antenna array system can include at least one electromagnetic shielding structure configured to electromagnetically shield one or more circuit components from the array of antenna elements. The antenna array system can also include one or more alignment structures configured to provide mechanical rigidity to the array of antenna elements and to allow for spacing between pairs of adjacent sheet metal structures.

Thin metal ultra-wideband antenna array systems and methods

Electronically scanned array (ESA) antennas are disclosed. An antenna may include an electronically scanned array (ESA) panel. The ESA panel may include a plurality of transmit/receive (T/R) modules, and each T/R module of the plurality of T/R modules may be contained within a unit cell of the ESA panel, where the unit cell has a surface area constrained by a maximum operating frequency of the ESA panel. The antenna may also include at least one radio frequency (RF) filter positioned within each particular unit cell of the ESA panel. The at least one RF filter may be configured to provide RF filtering specifically for the T/R module co-located within that particular unit cell of the ESA panel.

Unit cell filtering and diplexing for electronically scanned arrays

A coating for reducing interaction between a surface and the environment around the surface includes an alkali silicate glass material configured to protect the surface from environmental corrosion due to water or moisture. The alkali silicate glass material is doped with a first element to affect various forms of radiation passing through the coating. The electromagnetic radiation is at least one of ultraviolet, x-ray, atomic (gamma, alpha, beta), and electromagnetic or radio wave radiation. The coating may also be used to protect a solar cell from the environment and UV rays while retransmitting received light as usable light for conversion into electrical energy. The coating may also be used to prevent whisker formation in metal finishes of tin, cadmium, zinc, etc.

Alkali silicate glass based coating and method for applying

Provided in one embodiment is an article, comprising: a glass material; and an antiglare material covering at least partially the glass material; wherein the antiglare material comprises at least one alkali silicate.

Antiglare treatment for glass

A composition of matter is configured for use as at least a part of an energy source when combined with water. The composition of matter includes a metal comprising gallium and aluminum that is alloyed with the metal. The metal comprising gallium is liquid at a room temperature of 70&#xb0; F. and at a standard atmospheric pressure of 14.7 psi.

Methods and materials for use with fuel cells

An electronics package includes a substrate and at least one electronic component coupled to the substrate. The electronics package comprises an alkali silicate coating forming a hermetic seal around at least a portion of the at least one electronic component.

Integrated circuit protection and ruggedization coatings and methods

The present invention is directed to low-cost, low-processing temperature, and simple reinforcement, repair, and corrosion protection for hermetically sealed modules and hermetic connectors. A thin layer of glass is applied over the module's seal or the connector' glass frit. The layer of glass comprises an alkali silicate glass. The layer of glass is produced from a material which is a low viscosity liquid at room temperature prior to curing and is cured at low temperatures (typically no more than about 160 degrees Celsius). Subsequent to curing, the layer of glass is intimately bonded to the seal, watertight, and is stable from about negative two-hundred forty-three degrees Celsius to at least about seven-hundred twenty-seven degrees Celsius. The glass layer provides corrosion protection, seals any existing leaks, and possesses good flexibility and adhesion. The resulting bond is hermetic with good aqueous durability and strength similar to that of monolithic structures.

Method of reinforcing a hermetic seal of a module

A method of manufacturing an integrated circuit device includes providing a substrate; forming at least one cavity in the substrate; positioning a die within the at least one cavity of the substrate; and depositing a die attach material around the die within the at least one cavity to mechanically bond the die to the substrate.

High performance deposited die attach

The present invention is a method for providing an integrated circuit assembly, the integrated circuit assembly including an integrated circuit and a substrate. The method includes mounting the integrated circuit to the substrate. The method further includes, during assembly of the integrated circuit assembly, applying a low processing temperature, at least near-hermetic, glass-based coating directly to the integrated circuit and a localized interconnect interface, the interface being configured for connecting the integrated circuit to at least one of the substrate and a second integrated circuit of the assembly. The method further includes curing the coating. Further, the integrated circuit may be a device which is available for at least one of sale, lease and license to a general public, such as a Commercial off the Shelf (COTS) device. Still further, the coating may promote corrosion resistance and reliability of the integrated circuit assembly.

Method for providing near-hermetically coated integrated circuit assemblies

A method of protecting an electronics package is discussed along with devices formed by the method. The method involves providing at least one electronic component that requires protecting from tampering and/or reverse engineering. Further, the method includes mixing into a liquid glass material at least one of high durability micro-particles or high-durability nano-particles, to form a coating material. Further still, the method includes depositing the coating material onto the electronic component and curing the coating material deposited.

Integrated circuit tampering protection and reverse engineering prevention coatings and methods

A flexible cooling loop for providing a thermal path between a heat source and a heat sink includes a plurality of mechanically rigid tubing sections configured for being in thermal contact with the heat source and the heat sink. The cooling loop further includes a plurality if mechanically flexible tubing sections configured for connecting the mechanically rigid tubing sections to form the loop. The loop is configured for containing a liquid. The liquid is configured for being circulated within the loop for promoting transfer of thermal energy from the heat source to the heat sink via the loop.

Thermal spreader assembly with flexible liquid cooling loop having rigid tubing sections and flexible tubing sections

An assembly includes an integrated circuit die coupled to another component of the assembly with an alkali silicate glass material. The alkali silicate material may include particles for modifying the thermal, mechanical, and/or electrical characteristics of the material.

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North Liberty, IA, United States of America

Nathan P Lower