Apple Inc.

Nathan F Hanagami

Jay B Fletcher

Sanjay Pant

Hao Zhou

Floyd L Dankert

Enrico Zanetti

Jianbao Wang

Sujan K Manohar

Ludmil N Nikolov

Ruopeng Wang

Shawn Searles

Talbott Mead Houk

Siarhei Meliukh

Nikola Jovanovic

Wenxun Huang

Di Zhao

Alessandro Molari

Kiranjit Dhaliwal

Hartmut Sturm

Tristan R Hudson

Tiago Filipe Galhoz Patrao

Seyedeh Maryam Mortazavi Zanjani

Nicola Florio

Chad L Olson

John J Sullivan

Jonathan A Dutra

Michael P Wigley

Mircea-Andrei Lazar

Gaurav Sharma

Benedikt Wolf

Mahir Uka

Maryam Mortazavi

The present disclosure describes a system with a power management device, a wakeup circuit, a battery management device, and a connector. During a powered down mode of operation, the battery management device can provide, via the connector, a bias voltage to the wakeup circuit. In response to a wakeup switch being activated, the battery management device can provide a power supply (e.g., from a battery) to the power management device. Benefits of the wakeup circuit include (1) a reduction of battery consumption—and thus improving battery lifetime—when the electronic system is in a powered down mode of operation because the wakeup circuit has lower number of active components compared to other designs and (2) a non-complex wakeup circuit design because one or more existing connector interconnects between the power management device and the battery management device can be re-used during electronic system's powered down mode of operation.

Wakeup circuit

A low-dropout (LDO) regulator circuit with dynamic transitioning between first and second operation modes. The LDO regulator circuit includes an operational amplifier with a first input connected to a reference voltage, a feedback circuit connected between a second input of the operational amplifier and an output of the LDO regulator circuit, and a pass transistor selectively coupled to the feedback circuit and an output of the operational amplifier via a set switches controlled by a switch mode enable signal. The LDO regulator circuit transitions between the first and second operation modes responsive to one or more changes of the switch mode enable signal. In the first operation mode, a load voltage at the output of the LDO regulator circuit has a first voltage value that depends on the reference voltage. In the second operation mode, the load voltage has a second voltage value independent from the reference voltage.

Low-dropout regulator circuit with dynamic transition between operation modes

Systems and methods described herein correspond to supply harvesting operations. Power management circuitry may receive a supply voltage from other power management circuitry. This supply voltage may be a harvested supply from the other power management circuitry. Moreover, some of the power management circuitry may be operated as controller power management circuitry to supply the supply voltage via one or more rails and some of the power management circuitry may be operated as leaf power management circuitry to harvest the supply voltage from the one or more rails. Leaf power management circuitry may exclude a regulator, enabling that leaf power management circuitry to be entered into a lower power mode than previously enabled when the regulator was included.

General purpose input/output (GPIO) supply harvesting

A regulator circuit included in a computer system may include a control circuit and multiple pass circuits that source respective supply currents to a regulated power supply node by adjusting respective conductance values between an input power supply node and the regulated power supply node. The number of pass circuits can be adjusted on a design-by-design basis based on a threshold load current for the regulator circuit or on a threshold conductance between the input power supply node and the regulated power supply node. The control circuit adjusts the respective conductance values using a combination of respective sense currents generated by the multiple pass circuits along with a reference voltage and a voltage level of the regulated power supply node.

Scalable low dropout regulator having multiple pass circuits

A voltage regulator circuit included in a computer system may employ a control circuit and a switch array that includes multiple switch circuits. Different groups of switch circuits that include respective groups of switch devices are coupled between an input power supply node and corresponding regulated power supply nodes. To maintain desired respective voltages on the regulated power supply nodes, the control circuit compares the voltages of the regulated power supply nodes to corresponding reference voltages and, based on results of the comparisons, opens and closes various ones of the switch devices included in the different groups of switch circuits.

Regulator switch array

A dual loop LDO voltage regulator is disclosed. The voltage regulator circuit includes a first current mirror having first and second transistors having source terminals coupled to an input voltage node. The circuit further includes a second current mirror having third and fourth transistors, wherein drain terminals of the third and fourth transistors are coupled to drain terminals of the first and second transistors, respectively. A feedback circuit is coupled between source terminals of the third and fourth transistors, and is configured to generate a feedback signal based on a reference voltage and an output voltage present on the source terminal of the fourth transistor. The first and second current mirrors form a first control loop, and wherein the first and second current mirrors and the feedback circuit form a second control loop.

Dual loop LDO voltage regulator

A circuit and method for protecting from reverse current is disclosed. A reverse current protection circuit is coupled to a pass transistor of power circuitry (e.g., a power switch or voltage regulator), the pass transistor being coupled between first and second voltage nodes, the first voltage node being coupled to a power supply circuit. The reverse current protection circuit includes a sensing circuit that is configured to sense an amount of reverse current flowing through the pass transistor (from the second voltage node to the first voltage node). Responsive to the amount of reverse current exceeding a threshold value, the reverse current sensing circuit activates a shunt circuit, which redirects at least some of the reverse current to a reference node (e.g., ground).

Reverse current protection circuit

A level shifter circuit with an intermediate power domain and method for operating the same is disclosed. The level shifter circuit includes an input circuit, an output circuit, and an intermediate circuit. The input circuit is coupled to receive an input signal from a first voltage domain operating according to a first supply voltage, and generates a first intermediate signal. The intermediate circuit receives the first intermediate signal and generates a second intermediate signal. The output circuit receives the intermediate signal and provides an output signal into a second voltage domain operating at a second supply voltage different from the first. A voltage multiplexer is configured to provide one of the first or second supply voltages to the intermediate circuit depending on a state of the input signal.

Level shifter circuit with intermediate power domain

A level shifter circuit included in a computer system may include bootstrap and feedback nodes. The level shifter circuit may discharge the feedback node in response to high-going transition on a received input signal generated using a first power supply signal. The level shifter circuit may also increase a voltage level of the bootstrap node in response to the high-going transition and charge the bootstrap node, in response to the discharge of the feedback node, to a voltage level of a second power supply signal that is different than a voltage level of the first power supply signal. The level shifter circuit may generate an output signal using the voltage levels of the feedback node and the second power supply signal.

Bi-directional single supply level shifter circuit

Growing community of inventors

San Francisco, CA, United States of America

Nathan F Hanagami