Texas Instruments Corporation

Texas Instruments France

Nathalie Messina

Yves Leduc

Charvaka Duvvury

Kurt Peter Wachtler

Peter Brendan Considine

Jean-Christophe Jiguet

Kurt Wachtler

Charvaka Duwury

A modulation circuit uses pre-calculated and stored data to generate the modulated output. The modulator architecture uses pre-calculated, Gaussian filtered sine and cosine responses that are stored in a ROM (read-only memory) or other memory structure. The modulator output is then calculated as a simple sum of values read from the ROM and controlled by the input burst data stream.

8PSK modulator

A packaged semiconductor device () with a substrate () having, sandwiched in an insulator (), a flat sheet-like sieve member () made of a non-linear material switching from insulator to conductor mode at a preset voltage. Both member surfaces are free of indentations; the member is perforated by through-holes, which are grouped into a first set () and a second set (). Metal traces () over one member surface are positioned across the first set through-holes (); each trace is connected to a terminal on the substrate top and, through the hole, to a terminal on the substrate bottom. Analogous for metal traces () over the opposite member surface and second set through-holes (). Traces () overlap with a portion of traces () to form the locations for the conductivity switches, creating local ultra-low resistance bypasses to ground for discharging overstress events.

In package ESD protections of IC using a thin film polymer

A CMOS bus receiver for converting a reduced voltage swing input signal at an input node to a higher voltage swing output signal at an output node. The receiver includes a first and a second MOS transistor connected in series by their source and drain between a first side and a second side of a power supply, a gate of the first MOS transistor being connected to the input node, the common connection node of the first and second MOS transistors being connected to the output node. A third and a fourth MOS transistor connected in series by their source and drain between the first side of the power supply and the input node are also provided, a gate of the third MOS transistor being connected to the output node, and a gate of the second MOS transistor being connected to the common connection node of the third and fourth MOS transistors. A fifth MOS transistor is provided, connected in series by a source and drain with a diode between the first side of the power supply and the input node, a gate of the fourth MOS transistor being connected to the common connection node of the fifth MOS transistor and the diode. An inverter has an input connected to the output node and an output connected to a gate of the fifth MOS transistor.

Low power, up full swing voltage CMOS bus receiver

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Nice, France

Nathalie Messina