Fujitsu Corporation

Fujitsu Semiconductor Limited

Fujitsu Microelectronics Limited

Other

United Semiconductor Japan Co., Ltd.

Narumi Ohkawa

Taiji Ema

Masaya Katayama

Tadao Inoue

Katsuyoshi Yamamoto

Tadaaki Hayashi, Legal Representative

Masayoshi Asano

Toshio Nomura

Shigetoshi Takeda

Nobuhisa Naori

Masahiro Chijiiwa

Masao Hayashi

Yukihiro Ishihara

Kazuki Hayashi

A semiconductor device having a transistor with fin structure includes a channel layer that is disposed over a substrate and is connected to the substrate via a semiconductor layer, a source layer that is disposed on a first side surface of the channel layer over the substrate and is separated from the substrate via a first insulating layer, a drain layer that is disposed on a second side surface of the channel layer opposite to the first side surface over the substrate and is separated from the substrate via a second insulating layer, and a gate electrode including a first portion disposed over the channel layer and a second portion which is disposed between the substrate and the channel layer and whose third side surface or fourth side surface faces the semiconductor layer.

Semiconductor device and method of manufacturing semiconductor device

A semiconductor device includes a semiconductor substrate, a fin-shaped structure, a gate structure, a first doped region, a second doped region, and an intermediate region. The fin-shaped structure is disposed on and extends upwards from a top surface of the semiconductor substrate in a vertical direction. The gate structure is disposed straddling a part of the fin-shaped structure. At least a part of the first doped region is disposed in the fin-shaped structure. The second doped region is disposed in the fin-shaped structure and disposed above the first doped region in the vertical direction. The intermediate region is disposed in the fin-shaped structure. The second doped region is separated from the first doped region by the intermediate region, and a bottom surface of the gate structure is lower than or coplanar with a top surface of the first doped region in the vertical direction.

Semiconductor device

Two photons in an entangled state of polarization is created by parametric down conversion of a pump light. A first photon of the two photons is sent to a sender while a second photon of the two photons is sent to a receiver. The second photon is divided into a first component and a second component. The receiver makes the first component interact with an isotropic nonlinear optical medium. The sender selects the angle of a polarizer according to a signal that he wants to transmit to the receiver and measures the first photon after it passes the polarizer. The receiver mixes the first component and the second component by a half beam splitter. The receiver knows the signal by measuring the probability of photon detection of two output lights from the half beam splitter.

Communication method using the entangled state

A first photon in single-photon state is created when one of two photons created by parametric down conversion of a pump light is detected at a first detector. The first photon is divided into two components by a polarization beam splitter, and the first component is sent to a sender while the second component is sent to a receiver, with information that one of the two photons is detected. The sender selects whether he measures the first component or not according to the signal that he wants to transmit to the receiver. The second component of the first photon and a probe light enter into the second nonlinear optical medium. The receiver detects the phase modulation of the probe light caused by the interaction with the second component using homodyne detection during a first span after he receives the information from the first detector.

The first photon in single-photon state is divided into two components by the half beam splitter, and the first component is sent to the sender while the second component is sent to the receiver. The sender measures the first component of the first photon when he sends '1'. The sender doesn't measure the first component of the first photon when he sends '0'. The receiver makes the second component of the first photon enter into the Sagnac interferometer, and the receiver also makes the reference light enter into the Sagnac interferometer at the same time. The receiver makes the second component of the first photon interact with the reference light in the nonlinear optical medium arranged in the Sagnac interferometer. The receiver knows the signal from the phase modulation of the reference light caused by the interaction with the second component of the first photon.

The sender and the receiver prepare two photons in the entangled state of polarization. The first photon of the two photons is sent to the sender and the second photon of the two photons is sent to the receiver. The sender measures the first photon after the first photon pass the polarizer in which the vertical polarized photon can pass, when the sender sends the signal '1'. The sender measures the first photon after the first photon pass the polarizer in which the 45 degrees polarized photon can pass, when the sender sends the signal '0'. The receiver measures the second photon by the balanced homodyne measurement. And, the receiver knows the signal from the absolute value of the result of the balanced homodyne measurement.

A CMOS imaging device formed of plural CMOS photosensors arranged in a row and column formation, wherein a first CMOS photosensor and a second CMOS photosensor adjacent with each other in a column direction are formed in a single, continuous device region defined on a semiconductor substrate by a device isolation region.

CMOS imaging device having U-shaped device isolation regions

A semiconductor memory device includes: a first n-type transistor; a first p-type transistor; a first wiring layer having a first interconnecting portion for connecting a drain of the first n-type transistor and a drain of the first p-type transistor; and a second wiring layer having a first conductive portion electrically connected to the first interconnecting portion.

Semiconductor memory device and method for manufacturing

A semiconductor imaging device includes a photodetection region formed of a diffusion region of a first conductivity type formed in an active region of a silicon substrate at a first side of a gate electrode such that a top part thereof is separated from a surface of the silicon substrate and such that an inner edge part invades underneath a channel region right underneath the gate electrode, a shielding layer formed of a second conductivity type at a surface of the silicon substrate at the first side of the gate electrode such that an inner edge part thereof is aligned with a sidewall surface of the gate electrode at the first side, a floating diffusion region formed in the active region at a second side of the gate electrode, and a channel region formed right underneath said gate electrode, wherein the channel region includes a first channel region part formed adjacent to the shielding layer and a second channel region part formed adjacent to the floating diffusion region, wherein the second channel region part contains an impurity element with a concentration level lower than the impurity concentration level of the first channel region part.

Semiconductor imaging device and fabrication process thereof

A semiconductor imaging device having a plurality of pixels arranged in a matrix-like pattern, each of the pixels including a first photoelectric conversion unit, a second photoelectric conversion unit, a third photoelectric conversion unit and a forth photoelectric conversion unit for converting received light into signal charge; a first signal voltage conversion unit and a second voltage conversion unit for converting the signal charge into voltage; a first transistor for controlling the signal charge to be transferred from the first photoelectric conversion unit, the second photoelectric conversion unit, the third photoelectric conversion unit and the forth photoelectric conversion unit to the first signal voltage conversion unit and the second voltage conversion unit; and a signal voltage read-out unit having second, third and forth transistors.

Semiconductor imaging device having a plurality of pixels arranged in a matrix-like pattern

A CMOS image sensor with an effectively increased aperture ratio and moreover with improved optical sensitivity, and a method of manufacture of such a CMOS image sensor is provided a first aspect of the invention is an image sensor, has a pixel regionin which are formed a plurality of pixels each having at least a photodiode, a reset transistor, and a source-follower transistor; and a peripheral circuit regionin which are formed peripheral circuits which process read-out signals read out from the pixel region, a well region PWin the pixel region PWis formed to be more shallow than a well region in the peripheral circuit region. Also, reset transistors or source-follower transistors are formed in the shallow well region PWof the pixel region, and a photodiode region PHDis embedded below the transistor well region PW

Image sensor with embedded photodiode region and manufacturing method for same

A semiconductor device includes: a plurality of pixel units disposed in a matrix shape, each of the plurality of pixel units including: a first photoelectric conversion element for converting incident light of a first color into signal charges; a second photoelectric conversion element for converting incident light of a second color into signal charges; a third photoelectric conversion element for converting incident light of a third color into signal charges; and a detector circuit shared by the first to third photoelectric conversion elements for detecting the signal charges converted by each of the first to third photoelectric conversion elements, wherein the plurality of pixel units are pixel units adjacently disposing a row (column) juxtaposing the first photoelectric conversion element and detector circuit and a row (column) juxtaposing the second and third photoelectric conversion elements.

Semiconductor device including solid state image pickup device, and portable electronic apparatus

An image sensor has a plurality of pixels each with a photoelectric conversion element and a detection transistor the threshold voltage of which fluctuates in accordance with electrical charge generated in the photoelectric conversion element. The image sensor includes a second conductivity type shield region and a first conductivity type photoelectric conversion region; a first conductivity type well region linked to the photoelectric conversion region; a ring-like gate electrode; a second conductivity type source region at the inside of the ring-like gate electrode; a second conductivity type drain region. The image sensor further includes a potential pocket region that is formed in the well region below the ring-like gate electrode and accumulates the electrical charge, wherein the width of the gate electrode is formed narrower in the part adjacent to the photoelectric conversion region than in other parts.

Threshold voltage modulation image sensor

A semiconductor device including a pixel region in which one or more pixels are formed and a DRAM cell region in which one or more DRAM cells for storing output signals from the pixels are formed, characterized in that the layers constituting the pixel region and the DRAM cell region are formed in the same semiconductor process.

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Kawasaki, Japan

Narumi Ohkawa